mirror of
https://github.com/erik-toth/audio-synth.git
synced 2025-12-06 14:00:02 +00:00
Schaltung VCA und VCF sowie PWM-Erweiterung VCO
This commit is contained in:
@@ -1,5 +1,5 @@
|
||||
TRI-SQR-VCO_OTA
|
||||
*SPICE Netlist generated by Advanced Sim server on 18.09.2025 11:37:43
|
||||
*SPICE Netlist generated by Advanced Sim server on 30.09.2025 21:50:45
|
||||
.options MixedSimGenerated
|
||||
|
||||
*Schematic Netlist:
|
||||
@@ -18,6 +18,7 @@ XIC2B 0 NetC_an_1 Vcc Vee NetIC2_7 TL074
|
||||
XIC2C NetIC2_10 U_C Vcc Vee U_C TL074
|
||||
XIC2D NetIC2_12 NetIC2_13 Vcc Vee U_SAW TL074
|
||||
XIC3A 0 NetIC3_2 Vcc Vee U_in TL074
|
||||
XIC3B U_SAW NetIC3_6 Vcc Vee U_PWM TL074
|
||||
RR2 Vee U_TRI 20k
|
||||
RR3 NetIC1_1 Vcc 56k
|
||||
RR4a NetIC3_2 U_TRI 100k
|
||||
@@ -27,6 +28,9 @@ RR_CV NetR_CV_1 NetIC2_10 59.941k
|
||||
RR_E NetC_an_2 NetR_E_2 20k
|
||||
RR_goofer NetR_goofer_1 NetIC3_2 1Meg
|
||||
RR_lambda_T NetIC2_10 0 1.1k
|
||||
RR_PWM_a Vee NetIC3_6 8k
|
||||
RR_PWM_b NetIC3_6 Vcc 10k
|
||||
RR_PWM_c 0 U_PWM 1k
|
||||
RR_ref NetC_an_1 Vee 1.5Meg
|
||||
RR_SAW_a NetIC2_13 U_in 10k
|
||||
RR_SAW_b NetIC2_12 U_in 10k
|
||||
@@ -38,7 +42,7 @@ RR_trim_b Vcc NetR_goofer_1 50k
|
||||
RRoff NetIC3_2 Vee 650k
|
||||
QT1 NetC_an_1 U_C NetC_an_2 2N2907
|
||||
QT2 NetT2_3 0 NetC_an_2 2N2907
|
||||
JT? 0 NetR_SAW_e_2 NetIC2_12 BF545B
|
||||
JT_SAW 0 NetR_SAW_e_2 NetIC2_12 BF545B
|
||||
VU_mess NetT2_3 NetIC1_16 0
|
||||
VU_messref NetR_E_2 NetIC2_7 0
|
||||
VU_neg 0 Vee 15
|
||||
@@ -48,7 +52,7 @@ VU_var NetR_CV_1 0 1
|
||||
.PLOT TRAN {v(U_SQR)} =PLOT(2) =AXIS(1) =NAME(U_SQR) =UNITS(V)
|
||||
.PLOT TRAN {v(U_TRI)} =PLOT(1) =AXIS(1) =NAME(U_TRI) =UNITS(V)
|
||||
.PLOT TRAN {v(U_SAW)} =PLOT(3) =AXIS(1) =NAME(U_SAW) =UNITS(V)
|
||||
.PLOT TRAN {i(U_pos)*30} =PLOT(4) =AXIS(1) =NAME(P_Ges) =UNITS(W)
|
||||
.PLOT TRAN {v(U_PWM)} =PLOT(4) =AXIS(1) =NAME(PWM) =UNITS(V)
|
||||
|
||||
.OPTIONS ITL4=100 METHOD=GEAR MAXORD=2
|
||||
*Selected Circuit Analyses:
|
||||
|
||||
Reference in New Issue
Block a user