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PCB main schematic progress

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TOP done; MCU done; CV_GEN done; VCO done; PM done; VCA done; OS done; waiting for VCF; EXT waiting until VCF done
This commit is contained in:
Erik Tóth
2025-12-18 16:28:24 +01:00
parent 2a51182080
commit 1df705d7e2
82 changed files with 50 additions and 48 deletions
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11
dev/analog/ETOTH-Amp_LM386/Project Outputs for ETOTH-Amp_LM386/ETOTH-Amp_LM386.nsx
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@@ -1,5 +1,5 @@
ETOTH-Amp_LM386
*SPICE Netlist generated by Advanced Sim server on 08.12.2025 13:48:55
*SPICE Netlist generated by Advanced Sim server on 17.12.2025 16:45:18
.options MixedSimGenerated
*Schematic Netlist:
@@ -11,18 +11,19 @@ LL_Speaker 0 NetL_Speaker_2 0.1mH
RR_POTA 0 NetR_POT_2 {10k * {POS}}
RR_POTB NetR_POT_2 IN_FILT {10k - (10k * {POS})}
RR_Speaker NetL_Speaker_2 OUT 4R
RR_static1 NetIC1_3 NetR_POT_2 100k
RR_static1 NetIC1_3 NetR_POT_2 75k
RR_static2 0 NetIC1_3 10k
VU_q VAP 0 10V
VUin IN 0 DC 0 SIN(5 2 220 0 0 0) AC 1 0
.PLOT AC {MAG(v(OUT))} =PLOT(1) =AXIS(1) =NAME(A_Speaker)
.PLOT TRAN {v(IN)} =PLOT(1) =AXIS(1) =NAME(U_IN) =UNITS(V) =RGB(0, 0, 255)
.PLOT TRAN {v(OUT)} =PLOT(2) =AXIS(1) =NAME(U_OUT) =UNITS(V) =RGB(255, 153, 0)
.OPTIONS METHOD=GEAR MAXORD=2
*Selected Circuit Analyses:
.AC DEC 50 22 22000
.TRAN 90.91u 22.73m 0 90.91u
.CONTROL
SWEEP C_DCBLOCK_OUT LIST 100u 150u 220u 330u 470u 680u
SWEEP POS LIST 1
.ENDC
*Global Parameters:

2
dev/analog/ETOTH-Amp_LM386/Project Outputs for ETOTH-Amp_LM386/Status Report.Txt
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@@ -7,4 +7,4 @@ From : Project [ETOTH-Amp_LM386.PrjPcb]
Files Generated : 1
Documents Printed : 0
Finished Output Generation At 13:33:33 On 08.12.2025
Finished Output Generation At 16:43:39 On 17.12.2025