mirror of
https://github.com/erik-toth/audio-synth.git
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Altium DA Library Update
- Umbenennung ohne Versionsnummer - Neu Komponente hinzugefügt: Drehknopfschalter (1 Pol 4 Stufen) mit Symbol und PCB-Model inkl. 3D-Model - Info in README.md für Verwendung von DA-Library
This commit is contained in:
74848
dev/da_altium_lib/DA_LIB/A12405RNZQ.STEP
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dev/da_altium_lib/DA_LIB/A12405RNZQ.STEP
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1049
dev/da_altium_lib/DA_LIB/DA_LIB.LibPkg
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1049
dev/da_altium_lib/DA_LIB/DA_LIB.LibPkg
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dev/da_altium_lib/DA_LIB/DA_LIB.PcbLib
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dev/da_altium_lib/DA_LIB/DA_LIB.PcbLib
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dev/da_altium_lib/DA_LIB/DA_LIB.SchLib
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dev/da_altium_lib/DA_LIB/DA_LIB.SchLib
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dev/da_altium_lib/DA_LIB/DA_LIB_V1-0.cmp
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dev/da_altium_lib/DA_LIB/DA_LIB_V1-0.cmp
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Component Name : LM13700
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Part Count : 6
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Part : IC?
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Pins - (Normal) : 0
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Hidden Pins :
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Part : IC?A
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Pins - (Normal) : 5
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D_BIAS_A 15 Input
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IN_NINV_A 14 Input
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IN_INV_A 13 Input
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AMP_BIAS_A 16 Input
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OUT_A 12 Output
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Hidden Pins :
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Part : IC?B
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Pins - (Normal) : 5
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D_BIAS_B 2 Input
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IN_NINV_B 3 Input
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IN_INV_B 4 Input
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AMP_BIAS_B 1 Input
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OUT_B 5 Output
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Hidden Pins :
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Part : IC?C
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Pins - (Normal) : 2
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BUF_IN_A 10 Input
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BUF_OUT_A 9 Output
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Hidden Pins :
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Part : IC?D
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Pins - (Normal) : 2
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BUF_IN_B 7 Input
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BUF_OUT_B 8 Output
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Hidden Pins :
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Part : IC?E
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Pins - (Normal) : 2
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V_POS 11 Power
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V_NEG 6 Power
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Hidden Pins :
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BIN
dev/da_altium_lib/DA_LIB/History/DA_LIB.~(1).LibPkg.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB.~(1).LibPkg.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB.~(2).LibPkg.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB.~(2).LibPkg.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(1).LibPkg.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(1).LibPkg.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(1).PcbLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(1).PcbLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(1).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(1).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(13).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(13).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(14).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(14).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(15).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(15).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(16).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(16).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(17).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(17).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(18).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(18).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(19).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(19).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(3).PcbLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(3).PcbLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(4).PcbLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(4).PcbLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(5).PcbLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(5).PcbLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(7).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(7).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(8).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(8).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(9).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/DA_LIB_V1-0.~(9).SchLib.Zip
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dev/da_altium_lib/DA_LIB/History/LM13700-DUAL.~(1).LIB.Zip
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dev/da_altium_lib/DA_LIB/History/LM13700-DUAL.~(1).LIB.Zip
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dev/da_altium_lib/DA_LIB/History/LM13700-DUAL.~(2).LIB.Zip
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dev/da_altium_lib/DA_LIB/History/LM13700-DUAL.~(2).LIB.Zip
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7
dev/da_altium_lib/DA_LIB/LM13700-DUAL.ckt
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7
dev/da_altium_lib/DA_LIB/LM13700-DUAL.ckt
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@@ -0,0 +1,7 @@
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* A dual opamp ngspice model
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* file name: LM13700-DUAL.ckt
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.subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+ 2out 2in- 2in+ 2Dbias 2ABin
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.include LM13700.ckt
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XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS
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XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS
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.ends
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98
dev/da_altium_lib/DA_LIB/LM13700-DUAL_inc.ckt
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98
dev/da_altium_lib/DA_LIB/LM13700-DUAL_inc.ckt
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* A dual opamp ngspice model
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* file name: LM13700-DUAL.ckt
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.subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+ 2out 2in- 2in+ 2Dbias 2ABin
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*//////////////////////////////////////////////////////////////////////
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* (C) National Semiconductor, Inc.
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* Models developed and under copyright by:
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* National Semiconductor, Inc.
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*/////////////////////////////////////////////////////////////////////
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* Legal Notice: This material is intended for free software support.
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* The file may be copied, and distributed; however, reselling the
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* material is illegal
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*////////////////////////////////////////////////////////////////////
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* For ordering or technical information on these models, contact:
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* National Semiconductor's Customer Response Center
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* 7:00 A.M.--7:00 P.M. U.S. Central Time
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* (800) 272-9959
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* For Applications support, contact the Internet address:
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* amps-apps@galaxy.nsc.com
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* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
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* LM13700 Dual Operational Transconductance Amplifier
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* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
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*
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* Amplifier Bias Input
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* | Diode Bias
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* | | Positive Input
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* | | | Negative Input
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* | | | | Output
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* | | | | | Negative power supply
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* | | | | | | Buffer Input
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* | | | | | | | Buffer Output
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* | | | | | | | | Positive power supply
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* | | | | | | | | |
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.SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11
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*
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* Features:
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* gm adjustable over 6 decades.
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* Excellent gm linearity.
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* Linearizing diodes.
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* Wide supply range of +/-2V to +/-22V.
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*
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* Note: This model is single-pole in nature and over-estimates
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* AC bandwidth and phase margin (stability) by over 2X.
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* Although refinement may be possible in the future, please
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* use benchtesting to finalize AC circuit design.
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*
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* Note: Model is for single device only and simulated
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* supply current is 1/2 of total device current.
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*
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******************************************************
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*
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C1 6 4 4.8P
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C2 3 6 4.8P
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* Output capacitor
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C3 5 6 6.26P
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D1 2 4 DX
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D2 2 3 DX
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D3 11 21 DX
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D4 21 22 DX
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D5 1 26 DX
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D6 26 27 DX
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D7 5 29 DX
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D8 28 5 DX
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D10 31 25 DX
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* Clamp for -CMR
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D11 28 25 DX
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* Ios source
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F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9
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F2 11 5 V2 1.022
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F3 25 6 V3 1.0
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F4 5 6 V1 1.022
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* Output impedance
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F5 5 0 POLY(2) V3 V7 0 0 0 0 1
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G1 0 33 5 0 .55E-3
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I1 11 6 300U
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Q1 24 32 31 QX1
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Q2 23 3 31 QX2
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Q3 11 7 30 QZ
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Q4 11 30 8 QY
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V1 22 24 0V
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V2 22 23 0V
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V3 27 6 0V
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V4 11 29 1.4
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V5 28 6 1.2
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V6 4 32 0V
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V7 33 0 0V
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.MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
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.MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
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.MODEL QY NPN (IS=6E-15 BF=50)
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.MODEL QZ NPN (IS=5E-16 BF=266)
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.MODEL DX D (IS=5E-16)
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.ENDS
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*$
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XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS
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XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS
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.ends
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92
dev/da_altium_lib/DA_LIB/LM13700.ckt
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92
dev/da_altium_lib/DA_LIB/LM13700.ckt
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@@ -0,0 +1,92 @@
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*//////////////////////////////////////////////////////////////////////
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* (C) National Semiconductor, Inc.
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||||
* Models developed and under copyright by:
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* National Semiconductor, Inc.
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||||
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||||
*/////////////////////////////////////////////////////////////////////
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||||
* Legal Notice: This material is intended for free software support.
|
||||
* The file may be copied, and distributed; however, reselling the
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||||
* material is illegal
|
||||
|
||||
*////////////////////////////////////////////////////////////////////
|
||||
* For ordering or technical information on these models, contact:
|
||||
* National Semiconductor's Customer Response Center
|
||||
* 7:00 A.M.--7:00 P.M. U.S. Central Time
|
||||
* (800) 272-9959
|
||||
* For Applications support, contact the Internet address:
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||||
* amps-apps@galaxy.nsc.com
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||||
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* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
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* LM13700 Dual Operational Transconductance Amplifier
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* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
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*
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* Amplifier Bias Input
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* | Diode Bias
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||||
* | | Positive Input
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* | | | Negative Input
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||||
* | | | | Output
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||||
* | | | | | Negative power supply
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* | | | | | | Buffer Input
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* | | | | | | | Buffer Output
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* | | | | | | | | Positive power supply
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* | | | | | | | | |
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.SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11
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*
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* Features:
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* gm adjustable over 6 decades.
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* Excellent gm linearity.
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* Linearizing diodes.
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* Wide supply range of +/-2V to +/-22V.
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*
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||||
* Note: This model is single-pole in nature and over-estimates
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* AC bandwidth and phase margin (stability) by over 2X.
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||||
* Although refinement may be possible in the future, please
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* use benchtesting to finalize AC circuit design.
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||||
*
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||||
* Note: Model is for single device only and simulated
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* supply current is 1/2 of total device current.
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*
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******************************************************
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*
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C1 6 4 4.8P
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C2 3 6 4.8P
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* Output capacitor
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C3 5 6 6.26P
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D1 2 4 DX
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D2 2 3 DX
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D3 11 21 DX
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D4 21 22 DX
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D5 1 26 DX
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D6 26 27 DX
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D7 5 29 DX
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D8 28 5 DX
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D10 31 25 DX
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* Clamp for -CMR
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D11 28 25 DX
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* Ios source
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F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9
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F2 11 5 V2 1.022
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F3 25 6 V3 1.0
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F4 5 6 V1 1.022
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* Output impedance
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F5 5 0 POLY(2) V3 V7 0 0 0 0 1
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G1 0 33 5 0 .55E-3
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I1 11 6 300U
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Q1 24 32 31 QX1
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Q2 23 3 31 QX2
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Q3 11 7 30 QZ
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Q4 11 30 8 QY
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V1 22 24 0V
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V2 22 23 0V
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V3 27 6 0V
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V4 11 29 1.4
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V5 28 6 1.2
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V6 4 32 0V
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V7 33 0 0V
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.MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
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.MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
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.MODEL QY NPN (IS=6E-15 BF=50)
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.MODEL QZ NPN (IS=5E-16 BF=266)
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.MODEL DX D (IS=5E-16)
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.ENDS
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*$
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7595
dev/da_altium_lib/DA_LIB/LM13700N_NOPB.STEP
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7595
dev/da_altium_lib/DA_LIB/LM13700N_NOPB.STEP
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14
dev/da_altium_lib/DA_LIB/__Previews/LM13700-DUAL.LIBPreview
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14
dev/da_altium_lib/DA_LIB/__Previews/LM13700-DUAL.LIBPreview
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File diff suppressed because one or more lines are too long
Reference in New Issue
Block a user