Merge branch 'main' of https://github.com/erik-toth/audio-synth

dev/analog/.gitignore

@@ -0,0 +1 @@
+**/History

dev/analog/ETOTH-Amp_LM386/Project Outputs for ETOTH-Amp_LM386/ETOTH-Amp_LM386.nsx

@@ -1,31 +1,29 @@
 ETOTH-Amp_LM386
-*SPICE Netlist generated by Advanced Sim server on 03.12.2025 21:51:07
+*SPICE Netlist generated by Advanced Sim server on 08.12.2025 13:48:55
 .options MixedSimGenerated
 
 *Schematic Netlist:
-CC_DCBLOCK_IN NetC_DCBLOCK_IN_1 IN_FILT 10uF
+CC_DCBLOCK_IN IN IN_FILT 10uF
 CC_DCBLOCK_OUT NetC_DCBLOCK_OUT_1 OUT 220uF
 XIC1A NetIC1_1 0 NetIC1_3 0 NetC_DCBLOCK_OUT_1 VAP NetIC1_7 NetIC1_8 lm386
 XIC1B NetIC1_1 0 NetIC1_3 0 NetC_DCBLOCK_OUT_1 VAP NetIC1_7 NetIC1_8 lm386
 LL_Speaker 0 NetL_Speaker_2 0.1mH
-RR_G NetR_G_1 NetR_G_2 100k
 RR_POTA 0 NetR_POT_2 {10k * {POS}}
 RR_POTB NetR_POT_2 IN_FILT {10k - (10k * {POS})}
 RR_Speaker NetL_Speaker_2 OUT 4R
 RR_static1 NetIC1_3 NetR_POT_2 100k
 RR_static2 0 NetIC1_3 10k
-XT1 NetR_G_2 IN NetC_DCBLOCK_IN_1 BUZ-81
-VU_KBactive NetR_G_1 0 DC 0 PULSE(3.3 0 0 4u 1u 4.5m*4 4.5m*8) AC 1 0
 VU_q VAP 0 10V
 VUin IN 0 DC 0 SIN(5 2 220 0 0 0) AC 1 0
 
-.PLOT TRAN {v(IN)} =PLOT(1) =AXIS(1) =NAME(U_IN) =UNITS(V) =RGB(0, 0, 255)
-.PLOT TRAN {v(OUT)} =PLOT(2) =AXIS(1) =NAME(U_OUT) =UNITS(V) =RGB(255, 153, 0)
-.PLOT TRAN {v(U_KBactive)} =PLOT(2) =AXIS(1) =NAME(U_KBactive) =UNITS(V)
+.PLOT AC {MAG(v(OUT))} =PLOT(1) =AXIS(1) =NAME(A_Speaker)
 
 .OPTIONS METHOD=GEAR MAXORD=2
 *Selected Circuit Analyses:
-.TRAN 90.91u 180.0m 0 90.91u
+.AC DEC 50 22 22000
+.CONTROL
+SWEEP C_DCBLOCK_OUT LIST 100u 150u 220u 330u 470u 680u
+.ENDC
 
 *Global Parameters:
 .PARAM POS={1}
@@ -112,28 +110,4 @@ q14 out 10018 gnd ddnpn 100
 + Tf=1n Itf=1 Xtf=0 Vtf=10)
 .ends LM386
 
-*******
-*SRC=BUZ-81;BUZ-81;MOSFETs N;Siemens;800V 4A 2.5 Ohm
-*SYM=N-MOSFET
-.SUBCKT BUZ-81 1 2 3
-LS 5 2 7N
-LD 95 3 5N
-RG 4 11 5.5M
-RS 5 76 23M
-D81 76 95 DREV
-.MODEL DREV D CJO=0.4N RS=20M TT=625N IS=300P BV=800
-M81 86 11 76 96 MBUZ
-.MODEL MBUZ NMOS VTO=3.463 KP=3.263
-M2 11 86 8 8 MSW
-.MODEL MSW NMOS VTO=0.001 KP=5
-M3 86 11 8 8 MSW
-COX 11 8 1.3N
-DGD 8 86 DCGD
-.MODEL DCGD D CJO=0.265N M=0.495 VJ=0.975
-CGS 76 11 1N
-MRDR 86 86 95 86 MVRD
-.MODEL MVRD NMOS VTO=-24.99 KP=.022
-LG 4 1 7N
-.ENDS
-
 .END

dev/analog/ETOTH-Amp_LM386/Project Outputs for ETOTH-Amp_LM386/Status Report.Txt

@@ -7,4 +7,4 @@ From  : Project [ETOTH-Amp_LM386.PrjPcb]
 Files Generated   : 1
 Documents Printed : 0
 
-Finished Output Generation At 20:19:33 On 03.12.2025
+Finished Output Generation At 13:33:33 On 08.12.2025

dev/analog/ETOTH-TRI-SQR-VCO_OTA_SS/Project Outputs for TRI-SQR-VCO_OTA_SS/Status Report.Txt

@@ -7,4 +7,4 @@ From  : Project [TRI-SQR-VCO_OTA_SS.PrjPcb]
 Files Generated   : 1
 Documents Printed : 0
 
-Finished Output Generation At 17:11:02 On 03.12.2025
+Finished Output Generation At 15:12:22 On 09.12.2025

dev/analog/ETOTH-TRI-SQR-VCO_OTA_SS/Project Outputs for TRI-SQR-VCO_OTA_SS/TRI-SQR-VCO_OTA_SS.nsx

@@ -1,5 +1,9 @@
 TRI-SQR-VCO_OTA_SS
+<<<<<<< HEAD
 *SPICE Netlist generated by Advanced Sim server on 08.12.2025 23:07:23
+=======
+*SPICE Netlist generated by Advanced Sim server on 09.12.2025 15:13:04
+>>>>>>> 4c50a877b8fab4acd4165c9df592fd3d2535cd18
 .options MixedSimGenerated
 
 *Schematic Netlist:
@@ -21,12 +25,15 @@ XIC3A VCM NetIC3_2 VAP 0 U_in TL074
 XIC3B U_SAW NetIC3_6 VAP 0 NetIC3_7 TL074
 XIC3C VCM NetIC3_9 VAP 0 U_C TL074
 XIC3D VCM NetIC3_13 VAP 0 U_CV TL074
+<<<<<<< HEAD
 XIC4A R.VMID NetIC4_1 VAP 0 NetIC4_1 TL074
+=======
+XICSA R.VMID NetICS_2 VAP 0 NetICS_6 TL071
+>>>>>>> 4c50a877b8fab4acd4165c9df592fd3d2535cd18
 RPTC NetPTC_1 U_C 1k
 RR2 0 U_TRI 22k
 RR3 VAP NetIC1_1 15k
-RR4a NetIC3_2 NetR4a2_1 100k
-RR4a2 NetR4a2_1 U_TRI 100k
+RR4a NetIC3_2 U_TRI 200k
 RR4b U_in NetIC3_2 100k
 RR_Aa NetR_Aa_1 U_SQR_OTA 3.3k
 RR_Ab VCM NetR_Aa_1 330R
@@ -62,11 +69,17 @@ RR_uC_comp_GND 0 NetR_POT_uC_comp_1 330k
 RR_uC_comp_VAP NetR_POT_uC_comp_3 VAP 330k
 RRoff_a NetIC3_2 0 1Meg
 RRoff_b NetIC3_2 0 1Meg
-QT1 NetC_an_1 VCM NetC_an_2 2N2907
-QT2 NetT2_3 U_C NetC_an_2 2N2907
+XT1 VCM NetC_an_2 NetC_an_1 U_C NetC_an_2 NetT1_6 DMMT3906W
 JT_SAW VCM fet_gate NetIC2_12 BF256B
+<<<<<<< HEAD
 VU_mess NetT2_3 NetIC1_16 0
 VU_MESSITOGND NetIC4_1 VCM 0
+=======
+QTS1 VAP NetICS_6 NetICS_2 2N2222
+QTS2 0 NetICS_6 NetICS_2 2N2907
+VU_mess NetT1_6 NetIC1_16 0
+VU_MESSITOGND NetICS_2 VCM 0
+>>>>>>> 4c50a877b8fab4acd4165c9df592fd3d2535cd18
 VU_messref NetR_E_2 NetIC2_7 0
 VU_single VAP 0 +10V
 VU_var NetR_off_d_1 0 1
@@ -80,7 +93,7 @@ VU_var NetR_off_d_1 0 1
 
 .OPTIONS ABSTOL=1e-10 RELTOL=1e-2 VNTOL=1e-4 METHOD=GEAR MAXORD=2
 *Selected Circuit Analyses:
-.TRAN 100u 20m 5m 100u
+.TRAN 20u 20m 5m 20u
 
 *Models and Subcircuits:
 * A dual opamp ngspice model
@@ -226,12 +239,69 @@ VLN   0 92 DC 25
 .MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
 .ENDS TL074
 
+<<<<<<< HEAD
 *2N2907 MCE 5-27-97
 *Ref: Motorola Small-Signal Device databook, Q4/94
 *Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1
 .MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2
 + BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5
 + CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N)
+=======
+*TL071
+*Sngl LoNoise JFETInput OpAmp pkg:DIP8 3,2,7,4,6
+* Connections:
+*             Non-Inverting Input
+*             | Inverting Input
+*             | | Positive Power Supply
+*             | | | Negative Power Supply
+*             | | | | Output
+*             | | | | |
+.SUBCKT TL071 1 2 3 4 5
+C1   11 12 3.498E-12
+C2    6  7 15E-12
+DC    5 53 DX
+DE   54  5 DX
+DLP  90 91 DX
+DLN  92 90 DX
+DP    4  3 DX
+BGND 99  0 V=V(3)*.5 + V(4)*.5
+BB    7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
++              I(VLP)*5E6 - I(VLN)*5E6
+GA    6  0 11 12 282.8E-6
+GCM   0  6 10 99 8.942E-9
+ISS   3 10 DC 195E-6
+HLIM 90  0 VLIM 1K
+J1   11  2 10 JX
+J2   12  1 10 JX
+R2    6  9 100E3
+RD1   4 11 3.536E3
+RD2   4 12 3.536E3
+RO1   8  5 150
+RO2   7 99 150
+RP    3  4 2.143E3
+RSS  10 99 1.026E6
+VB    9  0 DC 0
+VC    3 53 DC 2.2
+VE   54  4 DC 2.2
+VLIM  7  8 DC 0
+VLP  91  0 DC 25
+VLN   0 92 DC 25
+.MODEL DX D(IS=800E-18)
+.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
+.ENDS TL071
+
+*SRC=DMMT3906W;DI_DMMT3906W;BJTs PNP; Si;  40.0V  0.200A  257MHz   Diodes, Inc. PNP 
+.MODEL DI_DMMT3906W  PNP (IS=20.3f NF=1.00 BF=274 VAF=114 
++ IKF=36.4m ISE=6.99p NE=2.00 BR=4.00 NR=1.00 
++ VAR=20.0 IKR=90.0m RE=1.01 RB=4.03 RC=0.403 
++ XTB=1.5 CJE=12.1p VJE=1.10 MJE=0.500 CJC=10.7p VJC=0.300 
++ MJC=0.300 TF=531p TR=85.6n EG=1.12 )
+
+.SUBCKT DMMT3906W  B1 E1 C1  B2 E2 C2
+Q1 C1 B1 E1 DI_DMMT3906W
+Q2 C2 B2 E2 DI_DMMT3906W
+.ENDS DMMT3906W
+>>>>>>> 4c50a877b8fab4acd4165c9df592fd3d2535cd18
 
 *PHILIPS SEMICONDUCTORS        Version: 1.0
 *Filename: bf256a_bf256b_philips
@@ -250,4 +320,18 @@ VLN   0 92 DC 25
 +              FC = 5.00000E-001
 +)
 
+*2N2222 MCE 5-20-97
+*Ref: Motorola Small-Signal Device Databook, Q4/94
+*Si 400mW 30V 800mA 300MHz GenPurp pkg:TO-18 3,2,1
+.MODEL 2N2222 NPN (IS=81.2F NF=1 BF=195 VAF=98.6 IKF=0.48 ISE=53.7P NE=2
++ BR=4 NR=1 VAR=20 IKR=0.72 RE=64.4M RB=0.258 RC=25.8M XTB=1.5
++ CJE=89.5P VJE=1.1 MJE=0.5 CJC=28.9P VJC=0.3 MJC=0.3 TF=530P TR=368N)
+
+*2N2907 MCE 5-27-97
+*Ref: Motorola Small-Signal Device databook, Q4/94
+*Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1
+.MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2
++ BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5
++ CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N)
+
 .END