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https://github.com/erik-toth/audio-synth.git
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Simulationen Analog - Altium
- V/Okt
- Log-Amp Diode
- Log-Amp Transistor
- Tri/Squ-Wave Gen mit Log-Amp Transistor
This commit is contained in:
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1081
dev/analog/ETOTH-Log_Amp_Transistor/Log_Amp_Transistor.PrjPcb
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1081
dev/analog/ETOTH-Log_Amp_Transistor/Log_Amp_Transistor.PrjPcb
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dev/analog/ETOTH-Log_Amp_Transistor/Log_Amp_Transistor.SchDoc
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dev/analog/ETOTH-Log_Amp_Transistor/Log_Amp_Transistor.SchDoc
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Log_Amp_Transistor
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*SPICE Netlist generated by Advanced Sim server on 08.07.2025 15:14:34
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.options MixedSimGenerated
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*Schematic Netlist:
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XIC1A 0 NetIC1_2 VCC VEE NetIC1_1 TL074
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RR1 NetIC1_1 NetR1_2 20k
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RR_ref1 NetIC1_2 VEE 1.5Meg
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QT1a NetIC1_2 IN1 NetR1_2 2N2907
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QT1b OUT1 0 NetR1_2 2N2907
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VU_ctrl NetU_ctrl_1 0 100mV
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VU_lol NetU_lol_1 0 18.021mV
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VU_mess OUT1 0 0
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VVneg 0 VEE 15
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VVpos VCC 0 15
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XX1 NetU_ctrl_1 NetU_lol_1 IN1 VOLTAGE_MULT
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.PLOT DC {v(U_mess)} =PLOT(2) =AXIS(1) =NAME(U_out (PNP)) =UNITS(V)
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.PLOT DC {i(U_mess)} =PLOT(1) =AXIS(1) =NAME(I_out (PNP)) =UNITS(A)
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.PLOT DC {i(R_ref1)} =PLOT(1) =AXIS(1) =NAME(I_ref) =UNITS(A) =RGB(255, 0, 0)
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*Selected Circuit Analyses:
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.DC U_ctrl 0 5 10m
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*Models and Subcircuits:
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*TL074
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*Quad LoNoise JFETInput OpAmp pkg:DIP14
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*+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14)
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* Connections:
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* Non-Inverting Input
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* | Inverting Input
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* | | Positive Power Supply
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* | | | Negative Power Supply
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* | | | | Output
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* | | | | |
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.SUBCKT TL074 1 2 3 4 5
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C1 11 12 3.498E-12
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C2 6 7 15E-12
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DC 5 53 DX
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DE 54 5 DX
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DLP 90 91 DX
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DLN 92 90 DX
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DP 4 3 DX
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BGND 99 0 V=V(3)*.5 + V(4)*.5
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BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
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+ I(VLP)*5E6 - I(VLN)*5E6
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GA 6 0 11 12 282.8E-6
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GCM 0 6 10 99 8.942E-9
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ISS 3 10 DC 195E-6
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HLIM 90 0 VLIM 1K
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J1 11 2 10 JX
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J2 12 1 10 JX
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R2 6 9 100E3
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RD1 4 11 3.536E3
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RD2 4 12 3.536E3
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RO1 8 5 150
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RO2 7 99 150
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RP 3 4 2.143E3
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RSS 10 99 1.026E6
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VB 9 0 DC 0
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VC 3 53 DC 2.2
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VE 54 4 DC 2.2
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VLIM 7 8 DC 0
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VLP 91 0 DC 25
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VLN 0 92 DC 25
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.MODEL DX D(IS=800E-18)
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.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
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.ENDS TL074
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*2N2907 MCE 5-27-97
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*Ref: Motorola Small-Signal Device databook, Q4/94
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*Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1
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.MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2
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+ BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5
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+ CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N)
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* Voltage Miltiplier
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.subckt Voltage_Mult in1 in2 out
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E1 out 0 value={v(in1)*v(in2)}
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.ends
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.END
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Output: Mixed Sim
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Type : AdvSimNetlist
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From : Project [Log_Amp_Transistor.PrjPcb]
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Generated File[Log_Amp_Transistor.nsx]
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Files Generated : 1
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Documents Printed : 0
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Finished Output Generation At 15:03:22 On 07.07.2025
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14005
dev/analog/ETOTH-Log_Amp_Transistor/Simulation/Log_Amp_Transistor.sdf
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14005
dev/analog/ETOTH-Log_Amp_Transistor/Simulation/Log_Amp_Transistor.sdf
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