Simulationen Analog - Altium

- V/Okt
    - Log-Amp Diode
    - Log-Amp Transistor
- Tri/Squ-Wave Gen mit Log-Amp Transistor
This commit is contained in:
Erik Tóth
2025-09-08 19:19:52 +02:00
parent e20aceee03
commit 7ba47a37e0
423 changed files with 54674 additions and 0 deletions

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Log_Amp_Transistor
*SPICE Netlist generated by Advanced Sim server on 08.07.2025 15:14:34
.options MixedSimGenerated
*Schematic Netlist:
XIC1A 0 NetIC1_2 VCC VEE NetIC1_1 TL074
RR1 NetIC1_1 NetR1_2 20k
RR_ref1 NetIC1_2 VEE 1.5Meg
QT1a NetIC1_2 IN1 NetR1_2 2N2907
QT1b OUT1 0 NetR1_2 2N2907
VU_ctrl NetU_ctrl_1 0 100mV
VU_lol NetU_lol_1 0 18.021mV
VU_mess OUT1 0 0
VVneg 0 VEE 15
VVpos VCC 0 15
XX1 NetU_ctrl_1 NetU_lol_1 IN1 VOLTAGE_MULT
.PLOT DC {v(U_mess)} =PLOT(2) =AXIS(1) =NAME(U_out (PNP)) =UNITS(V)
.PLOT DC {i(U_mess)} =PLOT(1) =AXIS(1) =NAME(I_out (PNP)) =UNITS(A)
.PLOT DC {i(R_ref1)} =PLOT(1) =AXIS(1) =NAME(I_ref) =UNITS(A) =RGB(255, 0, 0)
*Selected Circuit Analyses:
.DC U_ctrl 0 5 10m
*Models and Subcircuits:
*TL074
*Quad LoNoise JFETInput OpAmp pkg:DIP14
*+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14)
* Connections:
* Non-Inverting Input
* | Inverting Input
* | | Positive Power Supply
* | | | Negative Power Supply
* | | | | Output
* | | | | |
.SUBCKT TL074 1 2 3 4 5
C1 11 12 3.498E-12
C2 6 7 15E-12
DC 5 53 DX
DE 54 5 DX
DLP 90 91 DX
DLN 92 90 DX
DP 4 3 DX
BGND 99 0 V=V(3)*.5 + V(4)*.5
BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
+ I(VLP)*5E6 - I(VLN)*5E6
GA 6 0 11 12 282.8E-6
GCM 0 6 10 99 8.942E-9
ISS 3 10 DC 195E-6
HLIM 90 0 VLIM 1K
J1 11 2 10 JX
J2 12 1 10 JX
R2 6 9 100E3
RD1 4 11 3.536E3
RD2 4 12 3.536E3
RO1 8 5 150
RO2 7 99 150
RP 3 4 2.143E3
RSS 10 99 1.026E6
VB 9 0 DC 0
VC 3 53 DC 2.2
VE 54 4 DC 2.2
VLIM 7 8 DC 0
VLP 91 0 DC 25
VLN 0 92 DC 25
.MODEL DX D(IS=800E-18)
.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
.ENDS TL074
*2N2907 MCE 5-27-97
*Ref: Motorola Small-Signal Device databook, Q4/94
*Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1
.MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2
+ BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5
+ CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N)
* Voltage Miltiplier
.subckt Voltage_Mult in1 in2 out
E1 out 0 value={v(in1)*v(in2)}
.ends
.END

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Output: Mixed Sim
Type : AdvSimNetlist
From : Project [Log_Amp_Transistor.PrjPcb]
Generated File[Log_Amp_Transistor.nsx]
Files Generated : 1
Documents Printed : 0
Finished Output Generation At 15:03:22 On 07.07.2025

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