Cleaned up Schematics

This commit is contained in:
2026-03-18 11:01:39 +01:00
parent f0c2168e2b
commit a24b15c27b
493 changed files with 3025728 additions and 3024156 deletions

File diff suppressed because one or more lines are too long

View File

@@ -1 +1 @@
Record=TopLevelDocument|FileName=Amp_LM386.SchDoc|SheetNumber=1 Record=TopLevelDocument|FileName=Amp_LM386.SchDoc|SheetNumber=1

View File

@@ -1,114 +1,114 @@
ETOTH-Amp_LM386 ETOTH-Amp_LM386
*SPICE Netlist generated by Advanced Sim server on 17.12.2025 16:45:18 *SPICE Netlist generated by Advanced Sim server on 17.12.2025 16:45:18
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
CC_DCBLOCK_IN IN IN_FILT 10uF CC_DCBLOCK_IN IN IN_FILT 10uF
CC_DCBLOCK_OUT NetC_DCBLOCK_OUT_1 OUT 220uF CC_DCBLOCK_OUT NetC_DCBLOCK_OUT_1 OUT 220uF
XIC1A NetIC1_1 0 NetIC1_3 0 NetC_DCBLOCK_OUT_1 VAP NetIC1_7 NetIC1_8 lm386 XIC1A NetIC1_1 0 NetIC1_3 0 NetC_DCBLOCK_OUT_1 VAP NetIC1_7 NetIC1_8 lm386
XIC1B NetIC1_1 0 NetIC1_3 0 NetC_DCBLOCK_OUT_1 VAP NetIC1_7 NetIC1_8 lm386 XIC1B NetIC1_1 0 NetIC1_3 0 NetC_DCBLOCK_OUT_1 VAP NetIC1_7 NetIC1_8 lm386
LL_Speaker 0 NetL_Speaker_2 0.1mH LL_Speaker 0 NetL_Speaker_2 0.1mH
RR_POTA 0 NetR_POT_2 {10k * {POS}} RR_POTA 0 NetR_POT_2 {10k * {POS}}
RR_POTB NetR_POT_2 IN_FILT {10k - (10k * {POS})} RR_POTB NetR_POT_2 IN_FILT {10k - (10k * {POS})}
RR_Speaker NetL_Speaker_2 OUT 4R RR_Speaker NetL_Speaker_2 OUT 4R
RR_static1 NetIC1_3 NetR_POT_2 75k RR_static1 NetIC1_3 NetR_POT_2 75k
RR_static2 0 NetIC1_3 10k RR_static2 0 NetIC1_3 10k
VU_q VAP 0 10V VU_q VAP 0 10V
VUin IN 0 DC 0 SIN(5 2 220 0 0 0) AC 1 0 VUin IN 0 DC 0 SIN(5 2 220 0 0 0) AC 1 0
.PLOT TRAN {v(IN)} =PLOT(1) =AXIS(1) =NAME(U_IN) =UNITS(V) =RGB(0, 0, 255) .PLOT TRAN {v(IN)} =PLOT(1) =AXIS(1) =NAME(U_IN) =UNITS(V) =RGB(0, 0, 255)
.PLOT TRAN {v(OUT)} =PLOT(2) =AXIS(1) =NAME(U_OUT) =UNITS(V) =RGB(255, 153, 0) .PLOT TRAN {v(OUT)} =PLOT(2) =AXIS(1) =NAME(U_OUT) =UNITS(V) =RGB(255, 153, 0)
.OPTIONS METHOD=GEAR MAXORD=2 .OPTIONS METHOD=GEAR MAXORD=2
*Selected Circuit Analyses: *Selected Circuit Analyses:
.TRAN 90.91u 22.73m 0 90.91u .TRAN 90.91u 22.73m 0 90.91u
.CONTROL .CONTROL
SWEEP POS LIST 1 SWEEP POS LIST 1
.ENDC .ENDC
*Global Parameters: *Global Parameters:
.PARAM POS={1} .PARAM POS={1}
*Models and Subcircuits: *Models and Subcircuits:
*LM386 Audio power amplifier *LM386 Audio power amplifier
* /* * /*
* 1. The following model behavior shows good agreement with the * 1. The following model behavior shows good agreement with the
* LM386 data sheet values: * LM386 data sheet values:
* *
* a) Quiescent power supply current; * a) Quiescent power supply current;
* b) High frequency response at low gain setting; * b) High frequency response at low gain setting;
* c) Power-supply rejection ratio, both bypassed and unbypassed; * c) Power-supply rejection ratio, both bypassed and unbypassed;
* d) Voltage gain, both with pins 1&8 shorted and open; and * d) Voltage gain, both with pins 1&8 shorted and open; and
* e) Total harmonic distortion. * e) Total harmonic distortion.
* *
* 2. The model has the following discrepancies: * 2. The model has the following discrepancies:
* *
* f) High-gain frequency response looks somewhat more wideband * f) High-gain frequency response looks somewhat more wideband
* than the actual device; * than the actual device;
* g) Peak-to-peak output voltage swing is a bit more than the * g) Peak-to-peak output voltage swing is a bit more than the
* data sheet value- in other words, the model drives * data sheet value- in other words, the model drives
* closer to the rails; and * closer to the rails; and
* h) Input bias current in this model is only about 7 nA, * h) Input bias current in this model is only about 7 nA,
* compared with the 250 nA "typical" value mentioned in * compared with the 250 nA "typical" value mentioned in
* the data sheet. * the data sheet.
* *
* 3. The frequency response characteristics of this LM386 model * 3. The frequency response characteristics of this LM386 model
* can be adjusted somewhat by changing C1, the rolloff capacitor in * can be adjusted somewhat by changing C1, the rolloff capacitor in
* the voltage gain stage. It could also be made more realistic by * the voltage gain stage. It could also be made more realistic by
* tweaking transistor model parameters Cjc, Cje, Tr and Tf, * tweaking transistor model parameters Cjc, Cje, Tr and Tf,
* although this can get pretty hairy. * although this can get pretty hairy.
* *
* 4. Likewise, output drive capability could be made more * 4. Likewise, output drive capability could be made more
* realistic by tweaking transistor model parameters; again, this is * realistic by tweaking transistor model parameters; again, this is
* hairy. * hairy.
*/ */
* *
.subckt lm386 g1 inn inp gnd out vs byp g8 .subckt lm386 g1 inn inp gnd out vs byp g8
* | | | | | | | | * | | | | | | | |
* IC pins: 1 2 3 4 5 6 7 8 * IC pins: 1 2 3 4 5 6 7 8
* input emitter-follower buffers: * input emitter-follower buffers:
q1 gnd inn 10011 ddpnp q1 gnd inn 10011 ddpnp
r1 inn gnd 50k r1 inn gnd 50k
q2 gnd inp 10012 ddpnp q2 gnd inp 10012 ddpnp
r2 inp gnd 50k r2 inp gnd 50k
* differential input stage, gain-setting * differential input stage, gain-setting
* resistors, and internal feedback resistor: * resistors, and internal feedback resistor:
q3 10013 10011 10008 ddpnp q3 10013 10011 10008 ddpnp
q4 10014 10012 g1 ddpnp q4 10014 10012 g1 ddpnp
r3 vs byp 15k r3 vs byp 15k
r4 byp 10008 15k r4 byp 10008 15k
r5 10008 g8 150 r5 10008 g8 150
r6 g8 g1 1.35k r6 g8 g1 1.35k
r7 g1 out 15k r7 g1 out 15k
* input stage current mirror: * input stage current mirror:
q5 10013 10013 gnd ddnpn q5 10013 10013 gnd ddnpn
q6 10014 10013 gnd ddnpn q6 10014 10013 gnd ddnpn
* voltage gain stage & rolloff cap: * voltage gain stage & rolloff cap:
q7 10017 10014 gnd ddnpn q7 10017 10014 gnd ddnpn
c1 10014 10017 15pf c1 10014 10017 15pf
* current mirror source for gain stage: * current mirror source for gain stage:
i1 10002 vs dc 5m i1 10002 vs dc 5m
q8 10004 10002 vs ddpnp q8 10004 10002 vs ddpnp
q9 10002 10002 vs ddpnp q9 10002 10002 vs ddpnp
* Sziklai-connected push-pull output stage: * Sziklai-connected push-pull output stage:
q10 10018 10017 out ddpnp q10 10018 10017 out ddpnp
q11 10004 10004 10009 ddnpn 100 q11 10004 10004 10009 ddnpn 100
q12 10009 10009 10017 ddnpn 100 q12 10009 10009 10017 ddnpn 100
q13 vs 10004 out ddnpn 100 q13 vs 10004 out ddnpn 100
q14 out 10018 gnd ddnpn 100 q14 out 10018 gnd ddnpn 100
* generic transistor models generated * generic transistor models generated
* with MicroSim's PARTs utility, using * with MicroSim's PARTs utility, using
* default parameters except Bf: * default parameters except Bf:
.model ddnpn NPN(Is=10f Xti=3 Eg=1.11 Vaf=100 .model ddnpn NPN(Is=10f Xti=3 Eg=1.11 Vaf=100
+ Bf=400 Ise=0 Ne=1.5 Ikf=0 Nk=.5 Xtb=1.5 Var=100 + Bf=400 Ise=0 Ne=1.5 Ikf=0 Nk=.5 Xtb=1.5 Var=100
+ Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=2p Mjc=.3333 + Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=2p Mjc=.3333
+ Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n + Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n
+ Tf=1n Itf=1 Xtf=0 Vtf=10) + Tf=1n Itf=1 Xtf=0 Vtf=10)
.model ddpnp PNP(Is=10f Xti=3 Eg=1.11 Vaf=100 .model ddpnp PNP(Is=10f Xti=3 Eg=1.11 Vaf=100
+ Bf=200 Ise=0 Ne=1.5 Ikf=0 Nk=.5 Xtb=1.5 Var=100 + Bf=200 Ise=0 Ne=1.5 Ikf=0 Nk=.5 Xtb=1.5 Var=100
+ Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=2p Mjc=.3333 + Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=2p Mjc=.3333
+ Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n + Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n
+ Tf=1n Itf=1 Xtf=0 Vtf=10) + Tf=1n Itf=1 Xtf=0 Vtf=10)
.ends LM386 .ends LM386
.END .END

View File

@@ -1,10 +1,10 @@
Output: Mixed Sim Output: Mixed Sim
Type : AdvSimNetlist Type : AdvSimNetlist
From : Project [ETOTH-Amp_LM386.PrjPcb] From : Project [ETOTH-Amp_LM386.PrjPcb]
Generated File[ETOTH-Amp_LM386.nsx] Generated File[ETOTH-Amp_LM386.nsx]
Files Generated : 1 Files Generated : 1
Documents Printed : 0 Documents Printed : 0
Finished Output Generation At 16:43:39 On 17.12.2025 Finished Output Generation At 16:43:39 On 17.12.2025

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

View File

@@ -1 +1 @@
Record=TopLevelDocument|FileName=Log_Amp_Diode.SchDoc|SheetNumber=1 Record=TopLevelDocument|FileName=Log_Amp_Diode.SchDoc|SheetNumber=1

View File

@@ -1,72 +1,72 @@
Log_Amp_Diode Log_Amp_Diode
*SPICE Netlist generated by Advanced Sim server on 19.10.2025 11:32:26 *SPICE Netlist generated by Advanced Sim server on 19.10.2025 11:32:26
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
DD U_out NetD_C DI_1N4001 DD U_out NetD_C DI_1N4001
XIC1A 0 NetD_C VCC VEE U_out TL074 XIC1A 0 NetD_C VCC VEE U_out TL074
RR U_in NetD_C 5k RR U_in NetD_C 5k
VU_mess U_out 0 0 VU_mess U_out 0 0
VV_var U_in 0 -2 VV_var U_in 0 -2
VVneg 0 VEE 15 VVneg 0 VEE 15
VVpos VCC 0 15 VVpos VCC 0 15
.PLOT TRAN {i(U_mess)} =PLOT(1) =AXIS(1) =NAME(I_ABC) =UNITS(A) .PLOT TRAN {i(U_mess)} =PLOT(1) =AXIS(1) =NAME(I_ABC) =UNITS(A)
*Selected Circuit Analyses: *Selected Circuit Analyses:
.TRAN 0.1u 5u 0 0.1u .TRAN 0.1u 5u 0 0.1u
.CONTROL .CONTROL
SWEEP V_var LIST 0.25 0.5 1 2 SWEEP V_var LIST 0.25 0.5 1 2
.ENDC .ENDC
*Models and Subcircuits: *Models and Subcircuits:
*************************************************************************************************************************************** ***************************************************************************************************************************************
*SRC=1N4001;DI_1N4001;Diodes;Si; 50.0V 1.00A 3.00us Diodes, Inc. diode *SRC=1N4001;DI_1N4001;Diodes;Si; 50.0V 1.00A 3.00us Diodes, Inc. diode
.MODEL DI_1N4001 D ( IS=76.9p RS=42.0m BV=50.0 IBV=5.00u .MODEL DI_1N4001 D ( IS=76.9p RS=42.0m BV=50.0 IBV=5.00u
+ CJO=39.8p M=0.333 N=1.45 TT=4.32u ) + CJO=39.8p M=0.333 N=1.45 TT=4.32u )
*TL074 *TL074
*Quad LoNoise JFETInput OpAmp pkg:DIP14 *Quad LoNoise JFETInput OpAmp pkg:DIP14
*+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14) *+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14)
* Connections: * Connections:
* Non-Inverting Input * Non-Inverting Input
* | Inverting Input * | Inverting Input
* | | Positive Power Supply * | | Positive Power Supply
* | | | Negative Power Supply * | | | Negative Power Supply
* | | | | Output * | | | | Output
* | | | | | * | | | | |
.SUBCKT TL074 1 2 3 4 5 .SUBCKT TL074 1 2 3 4 5
C1 11 12 3.498E-12 C1 11 12 3.498E-12
C2 6 7 15E-12 C2 6 7 15E-12
DC 5 53 DX DC 5 53 DX
DE 54 5 DX DE 54 5 DX
DLP 90 91 DX DLP 90 91 DX
DLN 92 90 DX DLN 92 90 DX
DP 4 3 DX DP 4 3 DX
BGND 99 0 V=V(3)*.5 + V(4)*.5 BGND 99 0 V=V(3)*.5 + V(4)*.5
BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 + BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
+ I(VLP)*5E6 - I(VLN)*5E6 + I(VLP)*5E6 - I(VLN)*5E6
GA 6 0 11 12 282.8E-6 GA 6 0 11 12 282.8E-6
GCM 0 6 10 99 8.942E-9 GCM 0 6 10 99 8.942E-9
ISS 3 10 DC 195E-6 ISS 3 10 DC 195E-6
HLIM 90 0 VLIM 1K HLIM 90 0 VLIM 1K
J1 11 2 10 JX J1 11 2 10 JX
J2 12 1 10 JX J2 12 1 10 JX
R2 6 9 100E3 R2 6 9 100E3
RD1 4 11 3.536E3 RD1 4 11 3.536E3
RD2 4 12 3.536E3 RD2 4 12 3.536E3
RO1 8 5 150 RO1 8 5 150
RO2 7 99 150 RO2 7 99 150
RP 3 4 2.143E3 RP 3 4 2.143E3
RSS 10 99 1.026E6 RSS 10 99 1.026E6
VB 9 0 DC 0 VB 9 0 DC 0
VC 3 53 DC 2.2 VC 3 53 DC 2.2
VE 54 4 DC 2.2 VE 54 4 DC 2.2
VLIM 7 8 DC 0 VLIM 7 8 DC 0
VLP 91 0 DC 25 VLP 91 0 DC 25
VLN 0 92 DC 25 VLN 0 92 DC 25
.MODEL DX D(IS=800E-18) .MODEL DX D(IS=800E-18)
.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1) .MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
.ENDS TL074 .ENDS TL074
.END .END

View File

@@ -1,10 +1,10 @@
Output: Mixed Sim Output: Mixed Sim
Type : AdvSimNetlist Type : AdvSimNetlist
From : Project [Log_Amp_Diode.PrjPcb] From : Project [Log_Amp_Diode.PrjPcb]
Generated File[Log_Amp_Diode.nsx] Generated File[Log_Amp_Diode.nsx]
Files Generated : 1 Files Generated : 1
Documents Printed : 0 Documents Printed : 0
Finished Output Generation At 12:34:57 On 07.07.2025 Finished Output Generation At 12:34:57 On 07.07.2025

File diff suppressed because one or more lines are too long

View File

@@ -1,74 +1,74 @@
<?xml version="1.0"?> <?xml version="1.0"?>
<ProjectConfig xmlns:xsd="http://www.w3.org/2001/XMLSchema" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> <ProjectConfig xmlns:xsd="http://www.w3.org/2001/XMLSchema" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<Settings> <Settings>
<Version>1.1</Version> <Version>1.1</Version>
<Affect>Document</Affect> <Affect>Document</Affect>
</Settings> </Settings>
<Config /> <Config />
<Documents> <Documents>
<DocumentConfig> <DocumentConfig>
<Name>Log_Amp_Diode.SchDoc</Name> <Name>Log_Amp_Diode.SchDoc</Name>
<Id>IAMEUITX</Id> <Id>IAMEUITX</Id>
<Config>OP_Analysis=True|TRAN_Analysis=True|DC_Analysis=True|AC_Analysis=True|TF_Analysis=False|PZ_Analysis=False|Noise_Analysis=False|TRAN_FourierAnalysis=False|TempSweep_Analysis=False|ParamSweep_Analysis=True|MonteCarlo_Analysis=False|TF_Enabled=False|TF_Source=|TF_Reference=0|PZ_Enabled=False|PZ_Node1=|PZ_Node2=0|PZ_Node3=|PZ_Node4=0|PZ_AnalType=PZ|PZ_TfType=VOL|AnalysesDataSavedIndex=4|DC_ShowMeasTableChart=False|DC_PrimarySource=V_var|DC_PrimaryStart=-5|DC_PrimaryStop=0|DC_PrimaryStep=25m|DC_EnableSecondary=False|DC_SecondarySource=|DC_SecondaryStart=|DC_SecondaryStop=|DC_SecondaryStep=|Noise_Enabled=False|Noise_Source=|Noise_Output=|Noise_Reference=0|Noise_Start_UserValue=|Noise_Start=1K|Noise_Stop_UserValue=|Noise_Stop=1G|Noise_TestPoints_UserValue=|Noise_TestPoints=10|Noise_PointsPerSummary=0|Noise_SweepType=DEC|AC_StartFrequency_UserValue=|AC_StartFrequency=1K|AC_StopFrequency_UserValue=|AC_StopFrequency=1G|AC_TestPoints_UserValue=|AC_TestPoints=10|AC_SweepType=DEC|AC_ShowMeasTableChart=False|TRAN_StartTime_UserValue=|TRAN_StartTime=0|TRAN_StopTime_UserValue=|TRAN_StopTime=5u|TRAN_StepTime_UserValue=|TRAN_StepTime=0.1u|TRAN_MaxStepTime_UserValue=|TRAN_MaxStepTime=0.1u|TRAN_AlwaysSetDefaults=False|TRAN_DefaultCycles_UserValue=|TRAN_DefaultCycles=5|TRAN_DefaultPointsPerCycle_UserValue=|TRAN_DefaultPointsPerCycle=25|TRAN_UseInitialConditions=False|TRAN_FourierEnabled=False|TRAN_FourierFundFreq_UserValue=|TRAN_FourierFundFreq=1Meg|TRAN_FourierNumHarmonics_UserValue=|TRAN_FourierNumHarmonics=10|TRAN_ShowMeasTableChart=False|TempSweep_Start_UserValue=|TempSweep_Start=-10|TempSweep_Stop_UserValue=|TempSweep_Stop=60|TempSweep_Step_UserValue=|TempSweep_Step=10|ParamSweep_Parameter1=V_var|ParamSweep_Type1=LIST|ParamSweep_Start1=0|ParamSweep_Stop1=-2.000|ParamSweep_Step1=0.25 0.5 1 2|ParamSweep_SweepType1=False|ParamSweep_SecondaryEnabled=False|ParamSweep_Parameter2=|ParamSweep_Type2=LIN|ParamSweep_Start2=|ParamSweep_Stop2=|ParamSweep_Step2=|ParamSweep_SweepType2=False|MonteCarlo_NumberOfRuns=10|MonteCarlo_DistributionType=GAUSS|MonteCarlo_Seed=-1|MonteCarlo_ResistorTolerance=10%|MonteCarlo_ResistorTolerance_UserValue=10%|MonteCarlo_CapacitorTolerance=10%|MonteCarlo_CapacitorTolerance_UserValue=10%|MonteCarlo_InductorTolerance=10%|MonteCarlo_InductorTolerance_UserValue=10%|MonteCarlo_TransistorTolerance=10%|MonteCarlo_TransistorTolerance_UserValue=10%|MonteCarlo_DCSourceTolerance=10%|MonteCarlo_DCSourceTolerance_UserValue=10%|MonteCarlo_DigitalTpTolerance=10%|MonteCarlo_DigitalTpTolerance_UserValue=10%|Sensitivity_Analysis=False|Sensitivity_GroupDeviationsEnabled=False|Sensitivity_GroupResistorEnabled=True|Sensitivity_GroupResistorDeviation_UserValue=|Sensitivity_GroupResistorDeviation=1m|Sensitivity_GroupCapacitorEnabled=False|Sensitivity_GroupCapacitorDeviation_UserValue=|Sensitivity_GroupCapacitorDeviation=1m|Sensitivity_GroupInductorEnabled=False|Sensitivity_GroupInductorDeviation_UserValue=|Sensitivity_GroupInductorDeviation=1m|Sensitivity_GroupTransistorEnabled=False|Sensitivity_GroupTransistorDeviation_UserValue=|Sensitivity_GroupTransistorDeviation=1m|Sensitivity_GroupDcSourceEnabled=False|Sensitivity_GroupDcSourceDeviation_UserValue=|Sensitivity_GroupDcSourceDeviation=1m|Sensitivity_GroupGlobalParameterEnabled=False|Sensitivity_GroupGlobalParameterDeviation_UserValue=|Sensitivity_GroupGlobalParameterDeviation=1m|Sensitivity_CustomDeviationsEnabled=True|OldCfgLoaded=True|SimViewSetup=ShowActiveSignalsProbes|OPTION_Method=Trapezoidal|OPTION_SpiceRefNode_UserValue=|OPTION_SpiceRefNode=GND|OPTION_DVCC_UserValue=|OPTION_DVCC=5|OPTION_DVDD_UserValue=|OPTION_DVDD=15|SheetsToNetlist=0|ParamSweep_CustomStart0_UserValue=|ParamSweep_CustomStop0_UserValue=|ParamSweep_CustomStep0_UserValue=|ParamSweep_Start1_UserValue=|ParamSweep_Stop1_UserValue=|ParamSweep_Step1_UserValue=|Sensitivity_ParameterDeviation0_UserValue=|LaunchDate=2025-10-19 09:32:26Z|DC_CustomStart0_UserValue=-5|DC_CustomStop0_UserValue=0|DC_CustomStep0_UserValue=25m|DC_PrimaryStart_UserValue=-5|DC_PrimaryStop_UserValue=0|DC_PrimaryStep_UserValue=25m|DC_CustomEnabled0=True|DC_CustomSource0=V_var|DC_CustomStart0=-5|DC_CustomStop0=0|DC_CustomStep0=25m|DC_VariableEnabled0=True|DC_XVariable0=|DC_Variable0=v(U_out)|DC_VariableName0=U_out|DC_VariableUnits0=V|DC_VariablePlot0=0|DC_VariableAxis0=0|DC_VariableColor0=8421504|TRAN_VariableEnabled0=True|TRAN_XVariable0=|TRAN_Variable0=i(U_mess)|TRAN_VariableName0=I_ABC|TRAN_VariableUnits0=A|TRAN_VariablePlot0=0|TRAN_VariableAxis0=0|TRAN_VariableColor0=8421504|Variable0=i(U_mess)|VariablePlot0=0|VariableAxis0=0|VariableName0=I_ABC|VariableUnits0=A|VariableColor0=8421504|ParamSweep_CustomEnabled0=True|ParamSweep_CustomParameter0=V_var|ParamSweep_CustomType0=LIST|ParamSweep_CustomStart0=0|ParamSweep_CustomStop0=-2.000|ParamSweep_CustomStep0=0.25 0.5 1 2|Sensitivity_ParameterEnabled0=True|Sensitivity_Parameter0=Temp|Sensitivity_ParameterDeviation0=1m</Config> <Config>OP_Analysis=True|TRAN_Analysis=True|DC_Analysis=True|AC_Analysis=True|TF_Analysis=False|PZ_Analysis=False|Noise_Analysis=False|TRAN_FourierAnalysis=False|TempSweep_Analysis=False|ParamSweep_Analysis=True|MonteCarlo_Analysis=False|TF_Enabled=False|TF_Source=|TF_Reference=0|PZ_Enabled=False|PZ_Node1=|PZ_Node2=0|PZ_Node3=|PZ_Node4=0|PZ_AnalType=PZ|PZ_TfType=VOL|AnalysesDataSavedIndex=4|DC_ShowMeasTableChart=False|DC_PrimarySource=V_var|DC_PrimaryStart=-5|DC_PrimaryStop=0|DC_PrimaryStep=25m|DC_EnableSecondary=False|DC_SecondarySource=|DC_SecondaryStart=|DC_SecondaryStop=|DC_SecondaryStep=|Noise_Enabled=False|Noise_Source=|Noise_Output=|Noise_Reference=0|Noise_Start_UserValue=|Noise_Start=1K|Noise_Stop_UserValue=|Noise_Stop=1G|Noise_TestPoints_UserValue=|Noise_TestPoints=10|Noise_PointsPerSummary=0|Noise_SweepType=DEC|AC_StartFrequency_UserValue=|AC_StartFrequency=1K|AC_StopFrequency_UserValue=|AC_StopFrequency=1G|AC_TestPoints_UserValue=|AC_TestPoints=10|AC_SweepType=DEC|AC_ShowMeasTableChart=False|TRAN_StartTime_UserValue=|TRAN_StartTime=0|TRAN_StopTime_UserValue=|TRAN_StopTime=5u|TRAN_StepTime_UserValue=|TRAN_StepTime=0.1u|TRAN_MaxStepTime_UserValue=|TRAN_MaxStepTime=0.1u|TRAN_AlwaysSetDefaults=False|TRAN_DefaultCycles_UserValue=|TRAN_DefaultCycles=5|TRAN_DefaultPointsPerCycle_UserValue=|TRAN_DefaultPointsPerCycle=25|TRAN_UseInitialConditions=False|TRAN_FourierEnabled=False|TRAN_FourierFundFreq_UserValue=|TRAN_FourierFundFreq=1Meg|TRAN_FourierNumHarmonics_UserValue=|TRAN_FourierNumHarmonics=10|TRAN_ShowMeasTableChart=False|TempSweep_Start_UserValue=|TempSweep_Start=-10|TempSweep_Stop_UserValue=|TempSweep_Stop=60|TempSweep_Step_UserValue=|TempSweep_Step=10|ParamSweep_Parameter1=V_var|ParamSweep_Type1=LIST|ParamSweep_Start1=0|ParamSweep_Stop1=-2.000|ParamSweep_Step1=0.25 0.5 1 2|ParamSweep_SweepType1=False|ParamSweep_SecondaryEnabled=False|ParamSweep_Parameter2=|ParamSweep_Type2=LIN|ParamSweep_Start2=|ParamSweep_Stop2=|ParamSweep_Step2=|ParamSweep_SweepType2=False|MonteCarlo_NumberOfRuns=10|MonteCarlo_DistributionType=GAUSS|MonteCarlo_Seed=-1|MonteCarlo_ResistorTolerance=10%|MonteCarlo_ResistorTolerance_UserValue=10%|MonteCarlo_CapacitorTolerance=10%|MonteCarlo_CapacitorTolerance_UserValue=10%|MonteCarlo_InductorTolerance=10%|MonteCarlo_InductorTolerance_UserValue=10%|MonteCarlo_TransistorTolerance=10%|MonteCarlo_TransistorTolerance_UserValue=10%|MonteCarlo_DCSourceTolerance=10%|MonteCarlo_DCSourceTolerance_UserValue=10%|MonteCarlo_DigitalTpTolerance=10%|MonteCarlo_DigitalTpTolerance_UserValue=10%|Sensitivity_Analysis=False|Sensitivity_GroupDeviationsEnabled=False|Sensitivity_GroupResistorEnabled=True|Sensitivity_GroupResistorDeviation_UserValue=|Sensitivity_GroupResistorDeviation=1m|Sensitivity_GroupCapacitorEnabled=False|Sensitivity_GroupCapacitorDeviation_UserValue=|Sensitivity_GroupCapacitorDeviation=1m|Sensitivity_GroupInductorEnabled=False|Sensitivity_GroupInductorDeviation_UserValue=|Sensitivity_GroupInductorDeviation=1m|Sensitivity_GroupTransistorEnabled=False|Sensitivity_GroupTransistorDeviation_UserValue=|Sensitivity_GroupTransistorDeviation=1m|Sensitivity_GroupDcSourceEnabled=False|Sensitivity_GroupDcSourceDeviation_UserValue=|Sensitivity_GroupDcSourceDeviation=1m|Sensitivity_GroupGlobalParameterEnabled=False|Sensitivity_GroupGlobalParameterDeviation_UserValue=|Sensitivity_GroupGlobalParameterDeviation=1m|Sensitivity_CustomDeviationsEnabled=True|OldCfgLoaded=True|SimViewSetup=ShowActiveSignalsProbes|OPTION_Method=Trapezoidal|OPTION_SpiceRefNode_UserValue=|OPTION_SpiceRefNode=GND|OPTION_DVCC_UserValue=|OPTION_DVCC=5|OPTION_DVDD_UserValue=|OPTION_DVDD=15|SheetsToNetlist=0|ParamSweep_CustomStart0_UserValue=|ParamSweep_CustomStop0_UserValue=|ParamSweep_CustomStep0_UserValue=|ParamSweep_Start1_UserValue=|ParamSweep_Stop1_UserValue=|ParamSweep_Step1_UserValue=|Sensitivity_ParameterDeviation0_UserValue=|LaunchDate=2025-10-19 09:32:26Z|DC_CustomStart0_UserValue=-5|DC_CustomStop0_UserValue=0|DC_CustomStep0_UserValue=25m|DC_PrimaryStart_UserValue=-5|DC_PrimaryStop_UserValue=0|DC_PrimaryStep_UserValue=25m|DC_CustomEnabled0=True|DC_CustomSource0=V_var|DC_CustomStart0=-5|DC_CustomStop0=0|DC_CustomStep0=25m|DC_VariableEnabled0=True|DC_XVariable0=|DC_Variable0=v(U_out)|DC_VariableName0=U_out|DC_VariableUnits0=V|DC_VariablePlot0=0|DC_VariableAxis0=0|DC_VariableColor0=8421504|TRAN_VariableEnabled0=True|TRAN_XVariable0=|TRAN_Variable0=i(U_mess)|TRAN_VariableName0=I_ABC|TRAN_VariableUnits0=A|TRAN_VariablePlot0=0|TRAN_VariableAxis0=0|TRAN_VariableColor0=8421504|Variable0=i(U_mess)|VariablePlot0=0|VariableAxis0=0|VariableName0=I_ABC|VariableUnits0=A|VariableColor0=8421504|ParamSweep_CustomEnabled0=True|ParamSweep_CustomParameter0=V_var|ParamSweep_CustomType0=LIST|ParamSweep_CustomStart0=0|ParamSweep_CustomStop0=-2.000|ParamSweep_CustomStep0=0.25 0.5 1 2|Sensitivity_ParameterEnabled0=True|Sensitivity_Parameter0=Temp|Sensitivity_ParameterDeviation0=1m</Config>
<Results> <Results>
<ResultConfig> <ResultConfig>
<Name>Operating Point</Name> <Name>Operating Point</Name>
<Description /> <Description />
<Type>Operating Point</Type> <Type>Operating Point</Type>
<Date>2025-07-07 10:34:58Z</Date> <Date>2025-07-07 10:34:58Z</Date>
<IsLocked>false</IsLocked> <IsLocked>false</IsLocked>
<Config>OP_Analysis=True|TRAN_Analysis=False|DC_Analysis=False|AC_Analysis=False|TF_Analysis=False|PZ_Analysis=False|Noise_Analysis=False|TRAN_FourierAnalysis=False|TempSweep_Analysis=False|ParamSweep_Analysis=False|MonteCarlo_Analysis=False|TF_Enabled=False|TF_Source=|TF_Reference=0|PZ_Enabled=False|PZ_Node1=|PZ_Node2=0|PZ_Node3=|PZ_Node4=0|PZ_AnalType=PZ|PZ_TfType=VOL|AnalysesDataSavedIndex=2|DC_ShowMeasTableChart=False|DC_PrimarySource=|DC_PrimaryStart=|DC_PrimaryStop=|DC_PrimaryStep=|DC_EnableSecondary=False|DC_SecondarySource=|DC_SecondaryStart=|DC_SecondaryStop=|DC_SecondaryStep=|Noise_Enabled=False|Noise_Source=|Noise_Output=|Noise_Reference=0|Noise_Start_UserValue=|Noise_Start=1K|Noise_Stop_UserValue=|Noise_Stop=1G|Noise_TestPoints_UserValue=|Noise_TestPoints=10|Noise_PointsPerSummary=0|Noise_SweepType=DEC|AC_StartFrequency_UserValue=|AC_StartFrequency=1K|AC_StopFrequency_UserValue=|AC_StopFrequency=1G|AC_TestPoints_UserValue=|AC_TestPoints=10|AC_SweepType=DEC|AC_ShowMeasTableChart=False|TRAN_StartTime_UserValue=|TRAN_StartTime=0|TRAN_StopTime_UserValue=|TRAN_StopTime=5u|TRAN_StepTime_UserValue=|TRAN_StepTime=0.1u|TRAN_MaxStepTime_UserValue=|TRAN_MaxStepTime=0.1u|TRAN_AlwaysSetDefaults=False|TRAN_DefaultCycles_UserValue=|TRAN_DefaultCycles=5|TRAN_DefaultPointsPerCycle_UserValue=|TRAN_DefaultPointsPerCycle=25|TRAN_UseInitialConditions=False|TRAN_FourierEnabled=False|TRAN_FourierFundFreq_UserValue=|TRAN_FourierFundFreq=1Meg|TRAN_FourierNumHarmonics_UserValue=|TRAN_FourierNumHarmonics=10|TRAN_ShowMeasTableChart=False|TempSweep_Start_UserValue=|TempSweep_Start=-10|TempSweep_Stop_UserValue=|TempSweep_Stop=60|TempSweep_Step_UserValue=|TempSweep_Step=10|ParamSweep_Parameter1=Temp|ParamSweep_Type1=LIN|ParamSweep_Start1=1n|ParamSweep_Stop1=1u|ParamSweep_Step1=100n|ParamSweep_SweepType1=False|ParamSweep_SecondaryEnabled=False|ParamSweep_Parameter2=|ParamSweep_Type2=LIN|ParamSweep_Start2=|ParamSweep_Stop2=|ParamSweep_Step2=|ParamSweep_SweepType2=False|MonteCarlo_NumberOfRuns=10|MonteCarlo_DistributionType=GAUSS|MonteCarlo_Seed=-1|MonteCarlo_ResistorTolerance=10%|MonteCarlo_ResistorTolerance_UserValue=10%|MonteCarlo_CapacitorTolerance=10%|MonteCarlo_CapacitorTolerance_UserValue=10%|MonteCarlo_InductorTolerance=10%|MonteCarlo_InductorTolerance_UserValue=10%|MonteCarlo_TransistorTolerance=10%|MonteCarlo_TransistorTolerance_UserValue=10%|MonteCarlo_DCSourceTolerance=10%|MonteCarlo_DCSourceTolerance_UserValue=10%|MonteCarlo_DigitalTpTolerance=10%|MonteCarlo_DigitalTpTolerance_UserValue=10%|Sensitivity_Analysis=False|Sensitivity_GroupDeviationsEnabled=False|Sensitivity_GroupResistorEnabled=True|Sensitivity_GroupResistorDeviation_UserValue=|Sensitivity_GroupResistorDeviation=1m|Sensitivity_GroupCapacitorEnabled=False|Sensitivity_GroupCapacitorDeviation_UserValue=|Sensitivity_GroupCapacitorDeviation=1m|Sensitivity_GroupInductorEnabled=False|Sensitivity_GroupInductorDeviation_UserValue=|Sensitivity_GroupInductorDeviation=1m|Sensitivity_GroupTransistorEnabled=False|Sensitivity_GroupTransistorDeviation_UserValue=|Sensitivity_GroupTransistorDeviation=1m|Sensitivity_GroupDcSourceEnabled=False|Sensitivity_GroupDcSourceDeviation_UserValue=|Sensitivity_GroupDcSourceDeviation=1m|Sensitivity_GroupGlobalParameterEnabled=False|Sensitivity_GroupGlobalParameterDeviation_UserValue=|Sensitivity_GroupGlobalParameterDeviation=1m|Sensitivity_CustomDeviationsEnabled=True|OldCfgLoaded=True|SimViewSetup=ShowActiveSignalsProbes|OPTION_Method=Trapezoidal|OPTION_SpiceRefNode_UserValue=|OPTION_SpiceRefNode=GND|OPTION_DVCC_UserValue=|OPTION_DVCC=5|OPTION_DVDD_UserValue=|OPTION_DVDD=15|SheetsToNetlist=0|ParamSweep_CustomEnabled0=True|ParamSweep_CustomParameter0=Temp|ParamSweep_CustomType0=LIN|ParamSweep_CustomStart0_UserValue=|ParamSweep_CustomStart0=1n|ParamSweep_CustomStop0_UserValue=|ParamSweep_CustomStop0=1u|ParamSweep_CustomStep0_UserValue=|ParamSweep_CustomStep0=100n|ParamSweep_Start1_UserValue=|ParamSweep_Stop1_UserValue=|ParamSweep_Step1_UserValue=|Sensitivity_ParameterEnabled0=True|Sensitivity_Parameter0=Temp|Sensitivity_ParameterDeviation0_UserValue=|Sensitivity_ParameterDeviation0=1m|LaunchDate=2025-07-07 10:34:58Z</Config> <Config>OP_Analysis=True|TRAN_Analysis=False|DC_Analysis=False|AC_Analysis=False|TF_Analysis=False|PZ_Analysis=False|Noise_Analysis=False|TRAN_FourierAnalysis=False|TempSweep_Analysis=False|ParamSweep_Analysis=False|MonteCarlo_Analysis=False|TF_Enabled=False|TF_Source=|TF_Reference=0|PZ_Enabled=False|PZ_Node1=|PZ_Node2=0|PZ_Node3=|PZ_Node4=0|PZ_AnalType=PZ|PZ_TfType=VOL|AnalysesDataSavedIndex=2|DC_ShowMeasTableChart=False|DC_PrimarySource=|DC_PrimaryStart=|DC_PrimaryStop=|DC_PrimaryStep=|DC_EnableSecondary=False|DC_SecondarySource=|DC_SecondaryStart=|DC_SecondaryStop=|DC_SecondaryStep=|Noise_Enabled=False|Noise_Source=|Noise_Output=|Noise_Reference=0|Noise_Start_UserValue=|Noise_Start=1K|Noise_Stop_UserValue=|Noise_Stop=1G|Noise_TestPoints_UserValue=|Noise_TestPoints=10|Noise_PointsPerSummary=0|Noise_SweepType=DEC|AC_StartFrequency_UserValue=|AC_StartFrequency=1K|AC_StopFrequency_UserValue=|AC_StopFrequency=1G|AC_TestPoints_UserValue=|AC_TestPoints=10|AC_SweepType=DEC|AC_ShowMeasTableChart=False|TRAN_StartTime_UserValue=|TRAN_StartTime=0|TRAN_StopTime_UserValue=|TRAN_StopTime=5u|TRAN_StepTime_UserValue=|TRAN_StepTime=0.1u|TRAN_MaxStepTime_UserValue=|TRAN_MaxStepTime=0.1u|TRAN_AlwaysSetDefaults=False|TRAN_DefaultCycles_UserValue=|TRAN_DefaultCycles=5|TRAN_DefaultPointsPerCycle_UserValue=|TRAN_DefaultPointsPerCycle=25|TRAN_UseInitialConditions=False|TRAN_FourierEnabled=False|TRAN_FourierFundFreq_UserValue=|TRAN_FourierFundFreq=1Meg|TRAN_FourierNumHarmonics_UserValue=|TRAN_FourierNumHarmonics=10|TRAN_ShowMeasTableChart=False|TempSweep_Start_UserValue=|TempSweep_Start=-10|TempSweep_Stop_UserValue=|TempSweep_Stop=60|TempSweep_Step_UserValue=|TempSweep_Step=10|ParamSweep_Parameter1=Temp|ParamSweep_Type1=LIN|ParamSweep_Start1=1n|ParamSweep_Stop1=1u|ParamSweep_Step1=100n|ParamSweep_SweepType1=False|ParamSweep_SecondaryEnabled=False|ParamSweep_Parameter2=|ParamSweep_Type2=LIN|ParamSweep_Start2=|ParamSweep_Stop2=|ParamSweep_Step2=|ParamSweep_SweepType2=False|MonteCarlo_NumberOfRuns=10|MonteCarlo_DistributionType=GAUSS|MonteCarlo_Seed=-1|MonteCarlo_ResistorTolerance=10%|MonteCarlo_ResistorTolerance_UserValue=10%|MonteCarlo_CapacitorTolerance=10%|MonteCarlo_CapacitorTolerance_UserValue=10%|MonteCarlo_InductorTolerance=10%|MonteCarlo_InductorTolerance_UserValue=10%|MonteCarlo_TransistorTolerance=10%|MonteCarlo_TransistorTolerance_UserValue=10%|MonteCarlo_DCSourceTolerance=10%|MonteCarlo_DCSourceTolerance_UserValue=10%|MonteCarlo_DigitalTpTolerance=10%|MonteCarlo_DigitalTpTolerance_UserValue=10%|Sensitivity_Analysis=False|Sensitivity_GroupDeviationsEnabled=False|Sensitivity_GroupResistorEnabled=True|Sensitivity_GroupResistorDeviation_UserValue=|Sensitivity_GroupResistorDeviation=1m|Sensitivity_GroupCapacitorEnabled=False|Sensitivity_GroupCapacitorDeviation_UserValue=|Sensitivity_GroupCapacitorDeviation=1m|Sensitivity_GroupInductorEnabled=False|Sensitivity_GroupInductorDeviation_UserValue=|Sensitivity_GroupInductorDeviation=1m|Sensitivity_GroupTransistorEnabled=False|Sensitivity_GroupTransistorDeviation_UserValue=|Sensitivity_GroupTransistorDeviation=1m|Sensitivity_GroupDcSourceEnabled=False|Sensitivity_GroupDcSourceDeviation_UserValue=|Sensitivity_GroupDcSourceDeviation=1m|Sensitivity_GroupGlobalParameterEnabled=False|Sensitivity_GroupGlobalParameterDeviation_UserValue=|Sensitivity_GroupGlobalParameterDeviation=1m|Sensitivity_CustomDeviationsEnabled=True|OldCfgLoaded=True|SimViewSetup=ShowActiveSignalsProbes|OPTION_Method=Trapezoidal|OPTION_SpiceRefNode_UserValue=|OPTION_SpiceRefNode=GND|OPTION_DVCC_UserValue=|OPTION_DVCC=5|OPTION_DVDD_UserValue=|OPTION_DVDD=15|SheetsToNetlist=0|ParamSweep_CustomEnabled0=True|ParamSweep_CustomParameter0=Temp|ParamSweep_CustomType0=LIN|ParamSweep_CustomStart0_UserValue=|ParamSweep_CustomStart0=1n|ParamSweep_CustomStop0_UserValue=|ParamSweep_CustomStop0=1u|ParamSweep_CustomStep0_UserValue=|ParamSweep_CustomStep0=100n|ParamSweep_Start1_UserValue=|ParamSweep_Stop1_UserValue=|ParamSweep_Step1_UserValue=|Sensitivity_ParameterEnabled0=True|Sensitivity_Parameter0=Temp|Sensitivity_ParameterDeviation0_UserValue=|Sensitivity_ParameterDeviation0=1m|LaunchDate=2025-07-07 10:34:58Z</Config>
<Charts> <Charts>
<ChartConfig> <ChartConfig>
<Name>Operating Point</Name> <Name>Operating Point</Name>
<Id>GFQJLOFI</Id> <Id>GFQJLOFI</Id>
</ChartConfig> </ChartConfig>
</Charts> </Charts>
</ResultConfig> </ResultConfig>
<ResultConfig> <ResultConfig>
<Name>DC Sweep</Name> <Name>DC Sweep</Name>
<Description /> <Description />
<Type>DC Sweep</Type> <Type>DC Sweep</Type>
<Date>2025-07-07 10:46:41Z</Date> <Date>2025-07-07 10:46:41Z</Date>
<IsLocked>false</IsLocked> <IsLocked>false</IsLocked>
<Config>OP_Analysis=False|TRAN_Analysis=False|DC_Analysis=True|AC_Analysis=False|TF_Analysis=False|PZ_Analysis=False|Noise_Analysis=False|TRAN_FourierAnalysis=False|TempSweep_Analysis=True|ParamSweep_Analysis=False|MonteCarlo_Analysis=False|TF_Enabled=False|TF_Source=|TF_Reference=0|PZ_Enabled=False|PZ_Node1=|PZ_Node2=0|PZ_Node3=|PZ_Node4=0|PZ_AnalType=PZ|PZ_TfType=VOL|AnalysesDataSavedIndex=4|DC_ShowMeasTableChart=False|DC_PrimarySource=V_var|DC_PrimaryStart=-5|DC_PrimaryStop=0|DC_PrimaryStep=25m|DC_EnableSecondary=False|DC_SecondarySource=|DC_SecondaryStart=|DC_SecondaryStop=|DC_SecondaryStep=|Noise_Enabled=False|Noise_Source=|Noise_Output=|Noise_Reference=0|Noise_Start_UserValue=|Noise_Start=1K|Noise_Stop_UserValue=|Noise_Stop=1G|Noise_TestPoints_UserValue=|Noise_TestPoints=10|Noise_PointsPerSummary=0|Noise_SweepType=DEC|AC_StartFrequency_UserValue=|AC_StartFrequency=1K|AC_StopFrequency_UserValue=|AC_StopFrequency=1G|AC_TestPoints_UserValue=|AC_TestPoints=10|AC_SweepType=DEC|AC_ShowMeasTableChart=False|TRAN_StartTime_UserValue=|TRAN_StartTime=0|TRAN_StopTime_UserValue=|TRAN_StopTime=5u|TRAN_StepTime_UserValue=|TRAN_StepTime=0.1u|TRAN_MaxStepTime_UserValue=|TRAN_MaxStepTime=0.1u|TRAN_AlwaysSetDefaults=False|TRAN_DefaultCycles_UserValue=|TRAN_DefaultCycles=5|TRAN_DefaultPointsPerCycle_UserValue=|TRAN_DefaultPointsPerCycle=25|TRAN_UseInitialConditions=False|TRAN_FourierEnabled=False|TRAN_FourierFundFreq_UserValue=|TRAN_FourierFundFreq=1Meg|TRAN_FourierNumHarmonics_UserValue=|TRAN_FourierNumHarmonics=10|TRAN_ShowMeasTableChart=False|TempSweep_Start_UserValue=|TempSweep_Start=-10|TempSweep_Stop_UserValue=|TempSweep_Stop=60|TempSweep_Step_UserValue=|TempSweep_Step=10|ParamSweep_Parameter1=Temp|ParamSweep_Type1=LIN|ParamSweep_Start1=1n|ParamSweep_Stop1=1u|ParamSweep_Step1=100n|ParamSweep_SweepType1=False|ParamSweep_SecondaryEnabled=False|ParamSweep_Parameter2=|ParamSweep_Type2=LIN|ParamSweep_Start2=|ParamSweep_Stop2=|ParamSweep_Step2=|ParamSweep_SweepType2=False|MonteCarlo_NumberOfRuns=10|MonteCarlo_DistributionType=GAUSS|MonteCarlo_Seed=-1|MonteCarlo_ResistorTolerance=10%|MonteCarlo_ResistorTolerance_UserValue=10%|MonteCarlo_CapacitorTolerance=10%|MonteCarlo_CapacitorTolerance_UserValue=10%|MonteCarlo_InductorTolerance=10%|MonteCarlo_InductorTolerance_UserValue=10%|MonteCarlo_TransistorTolerance=10%|MonteCarlo_TransistorTolerance_UserValue=10%|MonteCarlo_DCSourceTolerance=10%|MonteCarlo_DCSourceTolerance_UserValue=10%|MonteCarlo_DigitalTpTolerance=10%|MonteCarlo_DigitalTpTolerance_UserValue=10%|Sensitivity_Analysis=False|Sensitivity_GroupDeviationsEnabled=False|Sensitivity_GroupResistorEnabled=True|Sensitivity_GroupResistorDeviation_UserValue=|Sensitivity_GroupResistorDeviation=1m|Sensitivity_GroupCapacitorEnabled=False|Sensitivity_GroupCapacitorDeviation_UserValue=|Sensitivity_GroupCapacitorDeviation=1m|Sensitivity_GroupInductorEnabled=False|Sensitivity_GroupInductorDeviation_UserValue=|Sensitivity_GroupInductorDeviation=1m|Sensitivity_GroupTransistorEnabled=False|Sensitivity_GroupTransistorDeviation_UserValue=|Sensitivity_GroupTransistorDeviation=1m|Sensitivity_GroupDcSourceEnabled=False|Sensitivity_GroupDcSourceDeviation_UserValue=|Sensitivity_GroupDcSourceDeviation=1m|Sensitivity_GroupGlobalParameterEnabled=False|Sensitivity_GroupGlobalParameterDeviation_UserValue=|Sensitivity_GroupGlobalParameterDeviation=1m|Sensitivity_CustomDeviationsEnabled=True|OldCfgLoaded=True|SimViewSetup=ShowActiveSignalsProbes|OPTION_Method=Trapezoidal|OPTION_SpiceRefNode_UserValue=|OPTION_SpiceRefNode=GND|OPTION_DVCC_UserValue=|OPTION_DVCC=5|OPTION_DVDD_UserValue=|OPTION_DVDD=15|SheetsToNetlist=0|ParamSweep_CustomStart0_UserValue=|ParamSweep_CustomStop0_UserValue=|ParamSweep_CustomStep0_UserValue=|ParamSweep_Start1_UserValue=|ParamSweep_Stop1_UserValue=|ParamSweep_Step1_UserValue=|Sensitivity_ParameterDeviation0_UserValue=|LaunchDate=2025-07-07 10:46:41Z|DC_CustomStart0_UserValue=-5|DC_CustomStop0_UserValue=0|DC_CustomStep0_UserValue=25m|DC_PrimaryStart_UserValue=-5|DC_PrimaryStop_UserValue=0|DC_PrimaryStep_UserValue=25m|DC_CustomEnabled0=True|DC_CustomSource0=V_var|DC_CustomStart0=-5|DC_CustomStop0=0|DC_CustomStep0=25m|DC_VariableEnabled0=True|DC_XVariable0=|DC_Variable0=v(U_out)|DC_VariableName0=U_out|DC_VariableUnits0=V|DC_VariablePlot0=0|DC_VariableAxis0=0|DC_VariableColor0=8421504|Variable0=v(U_out)|VariablePlot0=0|VariableAxis0=0|VariableName0=U_out|VariableUnits0=V|VariableColor0=8421504|ParamSweep_CustomEnabled0=True|ParamSweep_CustomParameter0=Temp|ParamSweep_CustomType0=LIN|ParamSweep_CustomStart0=1n|ParamSweep_CustomStop0=1u|ParamSweep_CustomStep0=100n|Sensitivity_ParameterEnabled0=True|Sensitivity_Parameter0=Temp|Sensitivity_ParameterDeviation0=1m</Config> <Config>OP_Analysis=False|TRAN_Analysis=False|DC_Analysis=True|AC_Analysis=False|TF_Analysis=False|PZ_Analysis=False|Noise_Analysis=False|TRAN_FourierAnalysis=False|TempSweep_Analysis=True|ParamSweep_Analysis=False|MonteCarlo_Analysis=False|TF_Enabled=False|TF_Source=|TF_Reference=0|PZ_Enabled=False|PZ_Node1=|PZ_Node2=0|PZ_Node3=|PZ_Node4=0|PZ_AnalType=PZ|PZ_TfType=VOL|AnalysesDataSavedIndex=4|DC_ShowMeasTableChart=False|DC_PrimarySource=V_var|DC_PrimaryStart=-5|DC_PrimaryStop=0|DC_PrimaryStep=25m|DC_EnableSecondary=False|DC_SecondarySource=|DC_SecondaryStart=|DC_SecondaryStop=|DC_SecondaryStep=|Noise_Enabled=False|Noise_Source=|Noise_Output=|Noise_Reference=0|Noise_Start_UserValue=|Noise_Start=1K|Noise_Stop_UserValue=|Noise_Stop=1G|Noise_TestPoints_UserValue=|Noise_TestPoints=10|Noise_PointsPerSummary=0|Noise_SweepType=DEC|AC_StartFrequency_UserValue=|AC_StartFrequency=1K|AC_StopFrequency_UserValue=|AC_StopFrequency=1G|AC_TestPoints_UserValue=|AC_TestPoints=10|AC_SweepType=DEC|AC_ShowMeasTableChart=False|TRAN_StartTime_UserValue=|TRAN_StartTime=0|TRAN_StopTime_UserValue=|TRAN_StopTime=5u|TRAN_StepTime_UserValue=|TRAN_StepTime=0.1u|TRAN_MaxStepTime_UserValue=|TRAN_MaxStepTime=0.1u|TRAN_AlwaysSetDefaults=False|TRAN_DefaultCycles_UserValue=|TRAN_DefaultCycles=5|TRAN_DefaultPointsPerCycle_UserValue=|TRAN_DefaultPointsPerCycle=25|TRAN_UseInitialConditions=False|TRAN_FourierEnabled=False|TRAN_FourierFundFreq_UserValue=|TRAN_FourierFundFreq=1Meg|TRAN_FourierNumHarmonics_UserValue=|TRAN_FourierNumHarmonics=10|TRAN_ShowMeasTableChart=False|TempSweep_Start_UserValue=|TempSweep_Start=-10|TempSweep_Stop_UserValue=|TempSweep_Stop=60|TempSweep_Step_UserValue=|TempSweep_Step=10|ParamSweep_Parameter1=Temp|ParamSweep_Type1=LIN|ParamSweep_Start1=1n|ParamSweep_Stop1=1u|ParamSweep_Step1=100n|ParamSweep_SweepType1=False|ParamSweep_SecondaryEnabled=False|ParamSweep_Parameter2=|ParamSweep_Type2=LIN|ParamSweep_Start2=|ParamSweep_Stop2=|ParamSweep_Step2=|ParamSweep_SweepType2=False|MonteCarlo_NumberOfRuns=10|MonteCarlo_DistributionType=GAUSS|MonteCarlo_Seed=-1|MonteCarlo_ResistorTolerance=10%|MonteCarlo_ResistorTolerance_UserValue=10%|MonteCarlo_CapacitorTolerance=10%|MonteCarlo_CapacitorTolerance_UserValue=10%|MonteCarlo_InductorTolerance=10%|MonteCarlo_InductorTolerance_UserValue=10%|MonteCarlo_TransistorTolerance=10%|MonteCarlo_TransistorTolerance_UserValue=10%|MonteCarlo_DCSourceTolerance=10%|MonteCarlo_DCSourceTolerance_UserValue=10%|MonteCarlo_DigitalTpTolerance=10%|MonteCarlo_DigitalTpTolerance_UserValue=10%|Sensitivity_Analysis=False|Sensitivity_GroupDeviationsEnabled=False|Sensitivity_GroupResistorEnabled=True|Sensitivity_GroupResistorDeviation_UserValue=|Sensitivity_GroupResistorDeviation=1m|Sensitivity_GroupCapacitorEnabled=False|Sensitivity_GroupCapacitorDeviation_UserValue=|Sensitivity_GroupCapacitorDeviation=1m|Sensitivity_GroupInductorEnabled=False|Sensitivity_GroupInductorDeviation_UserValue=|Sensitivity_GroupInductorDeviation=1m|Sensitivity_GroupTransistorEnabled=False|Sensitivity_GroupTransistorDeviation_UserValue=|Sensitivity_GroupTransistorDeviation=1m|Sensitivity_GroupDcSourceEnabled=False|Sensitivity_GroupDcSourceDeviation_UserValue=|Sensitivity_GroupDcSourceDeviation=1m|Sensitivity_GroupGlobalParameterEnabled=False|Sensitivity_GroupGlobalParameterDeviation_UserValue=|Sensitivity_GroupGlobalParameterDeviation=1m|Sensitivity_CustomDeviationsEnabled=True|OldCfgLoaded=True|SimViewSetup=ShowActiveSignalsProbes|OPTION_Method=Trapezoidal|OPTION_SpiceRefNode_UserValue=|OPTION_SpiceRefNode=GND|OPTION_DVCC_UserValue=|OPTION_DVCC=5|OPTION_DVDD_UserValue=|OPTION_DVDD=15|SheetsToNetlist=0|ParamSweep_CustomStart0_UserValue=|ParamSweep_CustomStop0_UserValue=|ParamSweep_CustomStep0_UserValue=|ParamSweep_Start1_UserValue=|ParamSweep_Stop1_UserValue=|ParamSweep_Step1_UserValue=|Sensitivity_ParameterDeviation0_UserValue=|LaunchDate=2025-07-07 10:46:41Z|DC_CustomStart0_UserValue=-5|DC_CustomStop0_UserValue=0|DC_CustomStep0_UserValue=25m|DC_PrimaryStart_UserValue=-5|DC_PrimaryStop_UserValue=0|DC_PrimaryStep_UserValue=25m|DC_CustomEnabled0=True|DC_CustomSource0=V_var|DC_CustomStart0=-5|DC_CustomStop0=0|DC_CustomStep0=25m|DC_VariableEnabled0=True|DC_XVariable0=|DC_Variable0=v(U_out)|DC_VariableName0=U_out|DC_VariableUnits0=V|DC_VariablePlot0=0|DC_VariableAxis0=0|DC_VariableColor0=8421504|Variable0=v(U_out)|VariablePlot0=0|VariableAxis0=0|VariableName0=U_out|VariableUnits0=V|VariableColor0=8421504|ParamSweep_CustomEnabled0=True|ParamSweep_CustomParameter0=Temp|ParamSweep_CustomType0=LIN|ParamSweep_CustomStart0=1n|ParamSweep_CustomStop0=1u|ParamSweep_CustomStep0=100n|Sensitivity_ParameterEnabled0=True|Sensitivity_Parameter0=Temp|Sensitivity_ParameterDeviation0=1m</Config>
<Charts> <Charts>
<ChartConfig> <ChartConfig>
<Name>DC Sweep</Name> <Name>DC Sweep</Name>
<Id>MPFXHVVV</Id> <Id>MPFXHVVV</Id>
</ChartConfig> </ChartConfig>
</Charts> </Charts>
</ResultConfig> </ResultConfig>
<ResultConfig> <ResultConfig>
<Name>Transient Analysis</Name> <Name>Transient Analysis</Name>
<Description /> <Description />
<Type>Transient Analysis</Type> <Type>Transient Analysis</Type>
<Date>2025-10-19 09:32:26Z</Date> <Date>2025-10-19 09:32:26Z</Date>
<IsLocked>false</IsLocked> <IsLocked>false</IsLocked>
<Config>OP_Analysis=False|TRAN_Analysis=True|DC_Analysis=False|AC_Analysis=False|TF_Analysis=False|PZ_Analysis=False|Noise_Analysis=False|TRAN_FourierAnalysis=False|TempSweep_Analysis=False|ParamSweep_Analysis=True|MonteCarlo_Analysis=False|TF_Enabled=False|TF_Source=|TF_Reference=0|PZ_Enabled=False|PZ_Node1=|PZ_Node2=0|PZ_Node3=|PZ_Node4=0|PZ_AnalType=PZ|PZ_TfType=VOL|AnalysesDataSavedIndex=4|DC_ShowMeasTableChart=False|DC_PrimarySource=V_var|DC_PrimaryStart=-5|DC_PrimaryStop=0|DC_PrimaryStep=25m|DC_EnableSecondary=False|DC_SecondarySource=|DC_SecondaryStart=|DC_SecondaryStop=|DC_SecondaryStep=|Noise_Enabled=False|Noise_Source=|Noise_Output=|Noise_Reference=0|Noise_Start_UserValue=|Noise_Start=1K|Noise_Stop_UserValue=|Noise_Stop=1G|Noise_TestPoints_UserValue=|Noise_TestPoints=10|Noise_PointsPerSummary=0|Noise_SweepType=DEC|AC_StartFrequency_UserValue=|AC_StartFrequency=1K|AC_StopFrequency_UserValue=|AC_StopFrequency=1G|AC_TestPoints_UserValue=|AC_TestPoints=10|AC_SweepType=DEC|AC_ShowMeasTableChart=False|TRAN_StartTime_UserValue=|TRAN_StartTime=0|TRAN_StopTime_UserValue=|TRAN_StopTime=5u|TRAN_StepTime_UserValue=|TRAN_StepTime=0.1u|TRAN_MaxStepTime_UserValue=|TRAN_MaxStepTime=0.1u|TRAN_AlwaysSetDefaults=False|TRAN_DefaultCycles_UserValue=|TRAN_DefaultCycles=5|TRAN_DefaultPointsPerCycle_UserValue=|TRAN_DefaultPointsPerCycle=25|TRAN_UseInitialConditions=False|TRAN_FourierEnabled=False|TRAN_FourierFundFreq_UserValue=|TRAN_FourierFundFreq=1Meg|TRAN_FourierNumHarmonics_UserValue=|TRAN_FourierNumHarmonics=10|TRAN_ShowMeasTableChart=False|TempSweep_Start_UserValue=|TempSweep_Start=-10|TempSweep_Stop_UserValue=|TempSweep_Stop=60|TempSweep_Step_UserValue=|TempSweep_Step=10|ParamSweep_Parameter1=V_var|ParamSweep_Type1=LIST|ParamSweep_Start1=0|ParamSweep_Stop1=-2.000|ParamSweep_Step1=0.25 0.5 1 2|ParamSweep_SweepType1=False|ParamSweep_SecondaryEnabled=False|ParamSweep_Parameter2=|ParamSweep_Type2=LIN|ParamSweep_Start2=|ParamSweep_Stop2=|ParamSweep_Step2=|ParamSweep_SweepType2=False|MonteCarlo_NumberOfRuns=10|MonteCarlo_DistributionType=GAUSS|MonteCarlo_Seed=-1|MonteCarlo_ResistorTolerance=10%|MonteCarlo_ResistorTolerance_UserValue=10%|MonteCarlo_CapacitorTolerance=10%|MonteCarlo_CapacitorTolerance_UserValue=10%|MonteCarlo_InductorTolerance=10%|MonteCarlo_InductorTolerance_UserValue=10%|MonteCarlo_TransistorTolerance=10%|MonteCarlo_TransistorTolerance_UserValue=10%|MonteCarlo_DCSourceTolerance=10%|MonteCarlo_DCSourceTolerance_UserValue=10%|MonteCarlo_DigitalTpTolerance=10%|MonteCarlo_DigitalTpTolerance_UserValue=10%|Sensitivity_Analysis=False|Sensitivity_GroupDeviationsEnabled=False|Sensitivity_GroupResistorEnabled=True|Sensitivity_GroupResistorDeviation_UserValue=|Sensitivity_GroupResistorDeviation=1m|Sensitivity_GroupCapacitorEnabled=False|Sensitivity_GroupCapacitorDeviation_UserValue=|Sensitivity_GroupCapacitorDeviation=1m|Sensitivity_GroupInductorEnabled=False|Sensitivity_GroupInductorDeviation_UserValue=|Sensitivity_GroupInductorDeviation=1m|Sensitivity_GroupTransistorEnabled=False|Sensitivity_GroupTransistorDeviation_UserValue=|Sensitivity_GroupTransistorDeviation=1m|Sensitivity_GroupDcSourceEnabled=False|Sensitivity_GroupDcSourceDeviation_UserValue=|Sensitivity_GroupDcSourceDeviation=1m|Sensitivity_GroupGlobalParameterEnabled=False|Sensitivity_GroupGlobalParameterDeviation_UserValue=|Sensitivity_GroupGlobalParameterDeviation=1m|Sensitivity_CustomDeviationsEnabled=True|OldCfgLoaded=True|SimViewSetup=ShowActiveSignalsProbes|OPTION_Method=Trapezoidal|OPTION_SpiceRefNode_UserValue=|OPTION_SpiceRefNode=GND|OPTION_DVCC_UserValue=|OPTION_DVCC=5|OPTION_DVDD_UserValue=|OPTION_DVDD=15|SheetsToNetlist=0|ParamSweep_CustomStart0_UserValue=|ParamSweep_CustomStop0_UserValue=|ParamSweep_CustomStep0_UserValue=|ParamSweep_Start1_UserValue=|ParamSweep_Stop1_UserValue=|ParamSweep_Step1_UserValue=|Sensitivity_ParameterDeviation0_UserValue=|LaunchDate=2025-10-19 09:32:26Z|DC_CustomStart0_UserValue=-5|DC_CustomStop0_UserValue=0|DC_CustomStep0_UserValue=25m|DC_PrimaryStart_UserValue=-5|DC_PrimaryStop_UserValue=0|DC_PrimaryStep_UserValue=25m|DC_CustomEnabled0=True|DC_CustomSource0=V_var|DC_CustomStart0=-5|DC_CustomStop0=0|DC_CustomStep0=25m|DC_VariableEnabled0=True|DC_XVariable0=|DC_Variable0=v(U_out)|DC_VariableName0=U_out|DC_VariableUnits0=V|DC_VariablePlot0=0|DC_VariableAxis0=0|DC_VariableColor0=8421504|TRAN_VariableEnabled0=True|TRAN_XVariable0=|TRAN_Variable0=i(U_mess)|TRAN_VariableName0=I_ABC|TRAN_VariableUnits0=A|TRAN_VariablePlot0=0|TRAN_VariableAxis0=0|TRAN_VariableColor0=8421504|Variable0=i(U_mess)|VariablePlot0=0|VariableAxis0=0|VariableName0=I_ABC|VariableUnits0=A|VariableColor0=8421504|ParamSweep_CustomEnabled0=True|ParamSweep_CustomParameter0=V_var|ParamSweep_CustomType0=LIST|ParamSweep_CustomStart0=0|ParamSweep_CustomStop0=-2.000|ParamSweep_CustomStep0=0.25 0.5 1 2|Sensitivity_ParameterEnabled0=True|Sensitivity_Parameter0=Temp|Sensitivity_ParameterDeviation0=1m</Config> <Config>OP_Analysis=False|TRAN_Analysis=True|DC_Analysis=False|AC_Analysis=False|TF_Analysis=False|PZ_Analysis=False|Noise_Analysis=False|TRAN_FourierAnalysis=False|TempSweep_Analysis=False|ParamSweep_Analysis=True|MonteCarlo_Analysis=False|TF_Enabled=False|TF_Source=|TF_Reference=0|PZ_Enabled=False|PZ_Node1=|PZ_Node2=0|PZ_Node3=|PZ_Node4=0|PZ_AnalType=PZ|PZ_TfType=VOL|AnalysesDataSavedIndex=4|DC_ShowMeasTableChart=False|DC_PrimarySource=V_var|DC_PrimaryStart=-5|DC_PrimaryStop=0|DC_PrimaryStep=25m|DC_EnableSecondary=False|DC_SecondarySource=|DC_SecondaryStart=|DC_SecondaryStop=|DC_SecondaryStep=|Noise_Enabled=False|Noise_Source=|Noise_Output=|Noise_Reference=0|Noise_Start_UserValue=|Noise_Start=1K|Noise_Stop_UserValue=|Noise_Stop=1G|Noise_TestPoints_UserValue=|Noise_TestPoints=10|Noise_PointsPerSummary=0|Noise_SweepType=DEC|AC_StartFrequency_UserValue=|AC_StartFrequency=1K|AC_StopFrequency_UserValue=|AC_StopFrequency=1G|AC_TestPoints_UserValue=|AC_TestPoints=10|AC_SweepType=DEC|AC_ShowMeasTableChart=False|TRAN_StartTime_UserValue=|TRAN_StartTime=0|TRAN_StopTime_UserValue=|TRAN_StopTime=5u|TRAN_StepTime_UserValue=|TRAN_StepTime=0.1u|TRAN_MaxStepTime_UserValue=|TRAN_MaxStepTime=0.1u|TRAN_AlwaysSetDefaults=False|TRAN_DefaultCycles_UserValue=|TRAN_DefaultCycles=5|TRAN_DefaultPointsPerCycle_UserValue=|TRAN_DefaultPointsPerCycle=25|TRAN_UseInitialConditions=False|TRAN_FourierEnabled=False|TRAN_FourierFundFreq_UserValue=|TRAN_FourierFundFreq=1Meg|TRAN_FourierNumHarmonics_UserValue=|TRAN_FourierNumHarmonics=10|TRAN_ShowMeasTableChart=False|TempSweep_Start_UserValue=|TempSweep_Start=-10|TempSweep_Stop_UserValue=|TempSweep_Stop=60|TempSweep_Step_UserValue=|TempSweep_Step=10|ParamSweep_Parameter1=V_var|ParamSweep_Type1=LIST|ParamSweep_Start1=0|ParamSweep_Stop1=-2.000|ParamSweep_Step1=0.25 0.5 1 2|ParamSweep_SweepType1=False|ParamSweep_SecondaryEnabled=False|ParamSweep_Parameter2=|ParamSweep_Type2=LIN|ParamSweep_Start2=|ParamSweep_Stop2=|ParamSweep_Step2=|ParamSweep_SweepType2=False|MonteCarlo_NumberOfRuns=10|MonteCarlo_DistributionType=GAUSS|MonteCarlo_Seed=-1|MonteCarlo_ResistorTolerance=10%|MonteCarlo_ResistorTolerance_UserValue=10%|MonteCarlo_CapacitorTolerance=10%|MonteCarlo_CapacitorTolerance_UserValue=10%|MonteCarlo_InductorTolerance=10%|MonteCarlo_InductorTolerance_UserValue=10%|MonteCarlo_TransistorTolerance=10%|MonteCarlo_TransistorTolerance_UserValue=10%|MonteCarlo_DCSourceTolerance=10%|MonteCarlo_DCSourceTolerance_UserValue=10%|MonteCarlo_DigitalTpTolerance=10%|MonteCarlo_DigitalTpTolerance_UserValue=10%|Sensitivity_Analysis=False|Sensitivity_GroupDeviationsEnabled=False|Sensitivity_GroupResistorEnabled=True|Sensitivity_GroupResistorDeviation_UserValue=|Sensitivity_GroupResistorDeviation=1m|Sensitivity_GroupCapacitorEnabled=False|Sensitivity_GroupCapacitorDeviation_UserValue=|Sensitivity_GroupCapacitorDeviation=1m|Sensitivity_GroupInductorEnabled=False|Sensitivity_GroupInductorDeviation_UserValue=|Sensitivity_GroupInductorDeviation=1m|Sensitivity_GroupTransistorEnabled=False|Sensitivity_GroupTransistorDeviation_UserValue=|Sensitivity_GroupTransistorDeviation=1m|Sensitivity_GroupDcSourceEnabled=False|Sensitivity_GroupDcSourceDeviation_UserValue=|Sensitivity_GroupDcSourceDeviation=1m|Sensitivity_GroupGlobalParameterEnabled=False|Sensitivity_GroupGlobalParameterDeviation_UserValue=|Sensitivity_GroupGlobalParameterDeviation=1m|Sensitivity_CustomDeviationsEnabled=True|OldCfgLoaded=True|SimViewSetup=ShowActiveSignalsProbes|OPTION_Method=Trapezoidal|OPTION_SpiceRefNode_UserValue=|OPTION_SpiceRefNode=GND|OPTION_DVCC_UserValue=|OPTION_DVCC=5|OPTION_DVDD_UserValue=|OPTION_DVDD=15|SheetsToNetlist=0|ParamSweep_CustomStart0_UserValue=|ParamSweep_CustomStop0_UserValue=|ParamSweep_CustomStep0_UserValue=|ParamSweep_Start1_UserValue=|ParamSweep_Stop1_UserValue=|ParamSweep_Step1_UserValue=|Sensitivity_ParameterDeviation0_UserValue=|LaunchDate=2025-10-19 09:32:26Z|DC_CustomStart0_UserValue=-5|DC_CustomStop0_UserValue=0|DC_CustomStep0_UserValue=25m|DC_PrimaryStart_UserValue=-5|DC_PrimaryStop_UserValue=0|DC_PrimaryStep_UserValue=25m|DC_CustomEnabled0=True|DC_CustomSource0=V_var|DC_CustomStart0=-5|DC_CustomStop0=0|DC_CustomStep0=25m|DC_VariableEnabled0=True|DC_XVariable0=|DC_Variable0=v(U_out)|DC_VariableName0=U_out|DC_VariableUnits0=V|DC_VariablePlot0=0|DC_VariableAxis0=0|DC_VariableColor0=8421504|TRAN_VariableEnabled0=True|TRAN_XVariable0=|TRAN_Variable0=i(U_mess)|TRAN_VariableName0=I_ABC|TRAN_VariableUnits0=A|TRAN_VariablePlot0=0|TRAN_VariableAxis0=0|TRAN_VariableColor0=8421504|Variable0=i(U_mess)|VariablePlot0=0|VariableAxis0=0|VariableName0=I_ABC|VariableUnits0=A|VariableColor0=8421504|ParamSweep_CustomEnabled0=True|ParamSweep_CustomParameter0=V_var|ParamSweep_CustomType0=LIST|ParamSweep_CustomStart0=0|ParamSweep_CustomStop0=-2.000|ParamSweep_CustomStep0=0.25 0.5 1 2|Sensitivity_ParameterEnabled0=True|Sensitivity_Parameter0=Temp|Sensitivity_ParameterDeviation0=1m</Config>
<Charts> <Charts>
<ChartConfig> <ChartConfig>
<Name>Transient Analysis</Name> <Name>Transient Analysis</Name>
<Id>WHUQUKMD</Id> <Id>WHUQUKMD</Id>
</ChartConfig> </ChartConfig>
</Charts> </Charts>
</ResultConfig> </ResultConfig>
<ResultConfig> <ResultConfig>
<Name>AC Analysis</Name> <Name>AC Analysis</Name>
<Description /> <Description />
<Type>AC Analysis</Type> <Type>AC Analysis</Type>
<Date>2025-07-07 10:34:58Z</Date> <Date>2025-07-07 10:34:58Z</Date>
<IsLocked>false</IsLocked> <IsLocked>false</IsLocked>
<Config>OP_Analysis=True|TRAN_Analysis=False|DC_Analysis=False|AC_Analysis=False|TF_Analysis=False|PZ_Analysis=False|Noise_Analysis=False|TRAN_FourierAnalysis=False|TempSweep_Analysis=False|ParamSweep_Analysis=False|MonteCarlo_Analysis=False|TF_Enabled=False|TF_Source=|TF_Reference=0|PZ_Enabled=False|PZ_Node1=|PZ_Node2=0|PZ_Node3=|PZ_Node4=0|PZ_AnalType=PZ|PZ_TfType=VOL|AnalysesDataSavedIndex=2|DC_ShowMeasTableChart=False|DC_PrimarySource=|DC_PrimaryStart=|DC_PrimaryStop=|DC_PrimaryStep=|DC_EnableSecondary=False|DC_SecondarySource=|DC_SecondaryStart=|DC_SecondaryStop=|DC_SecondaryStep=|Noise_Enabled=False|Noise_Source=|Noise_Output=|Noise_Reference=0|Noise_Start_UserValue=|Noise_Start=1K|Noise_Stop_UserValue=|Noise_Stop=1G|Noise_TestPoints_UserValue=|Noise_TestPoints=10|Noise_PointsPerSummary=0|Noise_SweepType=DEC|AC_StartFrequency_UserValue=|AC_StartFrequency=1K|AC_StopFrequency_UserValue=|AC_StopFrequency=1G|AC_TestPoints_UserValue=|AC_TestPoints=10|AC_SweepType=DEC|AC_ShowMeasTableChart=False|TRAN_StartTime_UserValue=|TRAN_StartTime=0|TRAN_StopTime_UserValue=|TRAN_StopTime=5u|TRAN_StepTime_UserValue=|TRAN_StepTime=0.1u|TRAN_MaxStepTime_UserValue=|TRAN_MaxStepTime=0.1u|TRAN_AlwaysSetDefaults=False|TRAN_DefaultCycles_UserValue=|TRAN_DefaultCycles=5|TRAN_DefaultPointsPerCycle_UserValue=|TRAN_DefaultPointsPerCycle=25|TRAN_UseInitialConditions=False|TRAN_FourierEnabled=False|TRAN_FourierFundFreq_UserValue=|TRAN_FourierFundFreq=1Meg|TRAN_FourierNumHarmonics_UserValue=|TRAN_FourierNumHarmonics=10|TRAN_ShowMeasTableChart=False|TempSweep_Start_UserValue=|TempSweep_Start=-10|TempSweep_Stop_UserValue=|TempSweep_Stop=60|TempSweep_Step_UserValue=|TempSweep_Step=10|ParamSweep_Parameter1=Temp|ParamSweep_Type1=LIN|ParamSweep_Start1=1n|ParamSweep_Stop1=1u|ParamSweep_Step1=100n|ParamSweep_SweepType1=False|ParamSweep_SecondaryEnabled=False|ParamSweep_Parameter2=|ParamSweep_Type2=LIN|ParamSweep_Start2=|ParamSweep_Stop2=|ParamSweep_Step2=|ParamSweep_SweepType2=False|MonteCarlo_NumberOfRuns=10|MonteCarlo_DistributionType=GAUSS|MonteCarlo_Seed=-1|MonteCarlo_ResistorTolerance=10%|MonteCarlo_ResistorTolerance_UserValue=10%|MonteCarlo_CapacitorTolerance=10%|MonteCarlo_CapacitorTolerance_UserValue=10%|MonteCarlo_InductorTolerance=10%|MonteCarlo_InductorTolerance_UserValue=10%|MonteCarlo_TransistorTolerance=10%|MonteCarlo_TransistorTolerance_UserValue=10%|MonteCarlo_DCSourceTolerance=10%|MonteCarlo_DCSourceTolerance_UserValue=10%|MonteCarlo_DigitalTpTolerance=10%|MonteCarlo_DigitalTpTolerance_UserValue=10%|Sensitivity_Analysis=False|Sensitivity_GroupDeviationsEnabled=False|Sensitivity_GroupResistorEnabled=True|Sensitivity_GroupResistorDeviation_UserValue=|Sensitivity_GroupResistorDeviation=1m|Sensitivity_GroupCapacitorEnabled=False|Sensitivity_GroupCapacitorDeviation_UserValue=|Sensitivity_GroupCapacitorDeviation=1m|Sensitivity_GroupInductorEnabled=False|Sensitivity_GroupInductorDeviation_UserValue=|Sensitivity_GroupInductorDeviation=1m|Sensitivity_GroupTransistorEnabled=False|Sensitivity_GroupTransistorDeviation_UserValue=|Sensitivity_GroupTransistorDeviation=1m|Sensitivity_GroupDcSourceEnabled=False|Sensitivity_GroupDcSourceDeviation_UserValue=|Sensitivity_GroupDcSourceDeviation=1m|Sensitivity_GroupGlobalParameterEnabled=False|Sensitivity_GroupGlobalParameterDeviation_UserValue=|Sensitivity_GroupGlobalParameterDeviation=1m|Sensitivity_CustomDeviationsEnabled=True|OldCfgLoaded=True|SimViewSetup=ShowActiveSignalsProbes|OPTION_Method=Trapezoidal|OPTION_SpiceRefNode_UserValue=|OPTION_SpiceRefNode=GND|OPTION_DVCC_UserValue=|OPTION_DVCC=5|OPTION_DVDD_UserValue=|OPTION_DVDD=15|SheetsToNetlist=0|ParamSweep_CustomEnabled0=True|ParamSweep_CustomParameter0=Temp|ParamSweep_CustomType0=LIN|ParamSweep_CustomStart0_UserValue=|ParamSweep_CustomStart0=1n|ParamSweep_CustomStop0_UserValue=|ParamSweep_CustomStop0=1u|ParamSweep_CustomStep0_UserValue=|ParamSweep_CustomStep0=100n|ParamSweep_Start1_UserValue=|ParamSweep_Stop1_UserValue=|ParamSweep_Step1_UserValue=|Sensitivity_ParameterEnabled0=True|Sensitivity_Parameter0=Temp|Sensitivity_ParameterDeviation0_UserValue=|Sensitivity_ParameterDeviation0=1m|LaunchDate=2025-07-07 10:34:58Z</Config> <Config>OP_Analysis=True|TRAN_Analysis=False|DC_Analysis=False|AC_Analysis=False|TF_Analysis=False|PZ_Analysis=False|Noise_Analysis=False|TRAN_FourierAnalysis=False|TempSweep_Analysis=False|ParamSweep_Analysis=False|MonteCarlo_Analysis=False|TF_Enabled=False|TF_Source=|TF_Reference=0|PZ_Enabled=False|PZ_Node1=|PZ_Node2=0|PZ_Node3=|PZ_Node4=0|PZ_AnalType=PZ|PZ_TfType=VOL|AnalysesDataSavedIndex=2|DC_ShowMeasTableChart=False|DC_PrimarySource=|DC_PrimaryStart=|DC_PrimaryStop=|DC_PrimaryStep=|DC_EnableSecondary=False|DC_SecondarySource=|DC_SecondaryStart=|DC_SecondaryStop=|DC_SecondaryStep=|Noise_Enabled=False|Noise_Source=|Noise_Output=|Noise_Reference=0|Noise_Start_UserValue=|Noise_Start=1K|Noise_Stop_UserValue=|Noise_Stop=1G|Noise_TestPoints_UserValue=|Noise_TestPoints=10|Noise_PointsPerSummary=0|Noise_SweepType=DEC|AC_StartFrequency_UserValue=|AC_StartFrequency=1K|AC_StopFrequency_UserValue=|AC_StopFrequency=1G|AC_TestPoints_UserValue=|AC_TestPoints=10|AC_SweepType=DEC|AC_ShowMeasTableChart=False|TRAN_StartTime_UserValue=|TRAN_StartTime=0|TRAN_StopTime_UserValue=|TRAN_StopTime=5u|TRAN_StepTime_UserValue=|TRAN_StepTime=0.1u|TRAN_MaxStepTime_UserValue=|TRAN_MaxStepTime=0.1u|TRAN_AlwaysSetDefaults=False|TRAN_DefaultCycles_UserValue=|TRAN_DefaultCycles=5|TRAN_DefaultPointsPerCycle_UserValue=|TRAN_DefaultPointsPerCycle=25|TRAN_UseInitialConditions=False|TRAN_FourierEnabled=False|TRAN_FourierFundFreq_UserValue=|TRAN_FourierFundFreq=1Meg|TRAN_FourierNumHarmonics_UserValue=|TRAN_FourierNumHarmonics=10|TRAN_ShowMeasTableChart=False|TempSweep_Start_UserValue=|TempSweep_Start=-10|TempSweep_Stop_UserValue=|TempSweep_Stop=60|TempSweep_Step_UserValue=|TempSweep_Step=10|ParamSweep_Parameter1=Temp|ParamSweep_Type1=LIN|ParamSweep_Start1=1n|ParamSweep_Stop1=1u|ParamSweep_Step1=100n|ParamSweep_SweepType1=False|ParamSweep_SecondaryEnabled=False|ParamSweep_Parameter2=|ParamSweep_Type2=LIN|ParamSweep_Start2=|ParamSweep_Stop2=|ParamSweep_Step2=|ParamSweep_SweepType2=False|MonteCarlo_NumberOfRuns=10|MonteCarlo_DistributionType=GAUSS|MonteCarlo_Seed=-1|MonteCarlo_ResistorTolerance=10%|MonteCarlo_ResistorTolerance_UserValue=10%|MonteCarlo_CapacitorTolerance=10%|MonteCarlo_CapacitorTolerance_UserValue=10%|MonteCarlo_InductorTolerance=10%|MonteCarlo_InductorTolerance_UserValue=10%|MonteCarlo_TransistorTolerance=10%|MonteCarlo_TransistorTolerance_UserValue=10%|MonteCarlo_DCSourceTolerance=10%|MonteCarlo_DCSourceTolerance_UserValue=10%|MonteCarlo_DigitalTpTolerance=10%|MonteCarlo_DigitalTpTolerance_UserValue=10%|Sensitivity_Analysis=False|Sensitivity_GroupDeviationsEnabled=False|Sensitivity_GroupResistorEnabled=True|Sensitivity_GroupResistorDeviation_UserValue=|Sensitivity_GroupResistorDeviation=1m|Sensitivity_GroupCapacitorEnabled=False|Sensitivity_GroupCapacitorDeviation_UserValue=|Sensitivity_GroupCapacitorDeviation=1m|Sensitivity_GroupInductorEnabled=False|Sensitivity_GroupInductorDeviation_UserValue=|Sensitivity_GroupInductorDeviation=1m|Sensitivity_GroupTransistorEnabled=False|Sensitivity_GroupTransistorDeviation_UserValue=|Sensitivity_GroupTransistorDeviation=1m|Sensitivity_GroupDcSourceEnabled=False|Sensitivity_GroupDcSourceDeviation_UserValue=|Sensitivity_GroupDcSourceDeviation=1m|Sensitivity_GroupGlobalParameterEnabled=False|Sensitivity_GroupGlobalParameterDeviation_UserValue=|Sensitivity_GroupGlobalParameterDeviation=1m|Sensitivity_CustomDeviationsEnabled=True|OldCfgLoaded=True|SimViewSetup=ShowActiveSignalsProbes|OPTION_Method=Trapezoidal|OPTION_SpiceRefNode_UserValue=|OPTION_SpiceRefNode=GND|OPTION_DVCC_UserValue=|OPTION_DVCC=5|OPTION_DVDD_UserValue=|OPTION_DVDD=15|SheetsToNetlist=0|ParamSweep_CustomEnabled0=True|ParamSweep_CustomParameter0=Temp|ParamSweep_CustomType0=LIN|ParamSweep_CustomStart0_UserValue=|ParamSweep_CustomStart0=1n|ParamSweep_CustomStop0_UserValue=|ParamSweep_CustomStop0=1u|ParamSweep_CustomStep0_UserValue=|ParamSweep_CustomStep0=100n|ParamSweep_Start1_UserValue=|ParamSweep_Stop1_UserValue=|ParamSweep_Step1_UserValue=|Sensitivity_ParameterEnabled0=True|Sensitivity_Parameter0=Temp|Sensitivity_ParameterDeviation0_UserValue=|Sensitivity_ParameterDeviation0=1m|LaunchDate=2025-07-07 10:34:58Z</Config>
<Charts> <Charts>
<ChartConfig> <ChartConfig>
<Name>Operating Point</Name> <Name>Operating Point</Name>
<Id>OOJEFYSL</Id> <Id>OOJEFYSL</Id>
</ChartConfig> </ChartConfig>
</Charts> </Charts>
</ResultConfig> </ResultConfig>
</Results> </Results>
</DocumentConfig> </DocumentConfig>
</Documents> </Documents>
<Results /> <Results />
</ProjectConfig> </ProjectConfig>

File diff suppressed because one or more lines are too long

View File

@@ -1 +1 @@
Record=TopLevelDocument|FileName=Log_Amp_Transistor.SchDoc|SheetNumber=1 Record=TopLevelDocument|FileName=Log_Amp_Transistor.SchDoc|SheetNumber=1

View File

@@ -1,76 +1,76 @@
Log_Amp_Transistor Log_Amp_Transistor
*SPICE Netlist generated by Advanced Sim server on 18.11.2025 13:26:39 *SPICE Netlist generated by Advanced Sim server on 18.11.2025 13:26:39
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
XIC1A 0 NetIC1_2 VCC VEE NetIC1_1 TL074 XIC1A 0 NetIC1_2 VCC VEE NetIC1_1 TL074
XIC1B 0 NetIC1_6 VCC VEE IN1 TL074 XIC1B 0 NetIC1_6 VCC VEE IN1 TL074
RR_1a NetR_1a_1 NetIC1_6 55.489k RR_1a NetR_1a_1 NetIC1_6 55.489k
RR_1b NetIC1_6 IN1 1k RR_1b NetIC1_6 IN1 1k
RR_E NetIC1_1 NetR_E_2 8k RR_E NetIC1_1 NetR_E_2 8k
RR_ref NetIC1_2 VEE 500k RR_ref NetIC1_2 VEE 500k
QT1a NetIC1_2 0 NetR_E_2 2N2907 QT1a NetIC1_2 0 NetR_E_2 2N2907
QT1b OUT1 IN1 NetR_E_2 2N2907 QT1b OUT1 IN1 NetR_E_2 2N2907
VU_ctrl NetR_1a_1 0 1V VU_ctrl NetR_1a_1 0 1V
VU_mess OUT1 0 0 VU_mess OUT1 0 0
VVneg 0 VEE +5V VVneg 0 VEE +5V
VVpos VCC 0 +5V VVpos VCC 0 +5V
.PLOT DC {i(U_mess)} =PLOT(1) =AXIS(1) =NAME(I_out (PNP)) =UNITS(A) =RGB(0, 0, 255) .PLOT DC {i(U_mess)} =PLOT(1) =AXIS(1) =NAME(I_out (PNP)) =UNITS(A) =RGB(0, 0, 255)
*Selected Circuit Analyses: *Selected Circuit Analyses:
.DC U_ctrl -2 2 2.5m .DC U_ctrl -2 2 2.5m
*Models and Subcircuits: *Models and Subcircuits:
*TL074 *TL074
*Quad LoNoise JFETInput OpAmp pkg:DIP14 *Quad LoNoise JFETInput OpAmp pkg:DIP14
*+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14) *+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14)
* Connections: * Connections:
* Non-Inverting Input * Non-Inverting Input
* | Inverting Input * | Inverting Input
* | | Positive Power Supply * | | Positive Power Supply
* | | | Negative Power Supply * | | | Negative Power Supply
* | | | | Output * | | | | Output
* | | | | | * | | | | |
.SUBCKT TL074 1 2 3 4 5 .SUBCKT TL074 1 2 3 4 5
C1 11 12 3.498E-12 C1 11 12 3.498E-12
C2 6 7 15E-12 C2 6 7 15E-12
DC 5 53 DX DC 5 53 DX
DE 54 5 DX DE 54 5 DX
DLP 90 91 DX DLP 90 91 DX
DLN 92 90 DX DLN 92 90 DX
DP 4 3 DX DP 4 3 DX
BGND 99 0 V=V(3)*.5 + V(4)*.5 BGND 99 0 V=V(3)*.5 + V(4)*.5
BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 + BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
+ I(VLP)*5E6 - I(VLN)*5E6 + I(VLP)*5E6 - I(VLN)*5E6
GA 6 0 11 12 282.8E-6 GA 6 0 11 12 282.8E-6
GCM 0 6 10 99 8.942E-9 GCM 0 6 10 99 8.942E-9
ISS 3 10 DC 195E-6 ISS 3 10 DC 195E-6
HLIM 90 0 VLIM 1K HLIM 90 0 VLIM 1K
J1 11 2 10 JX J1 11 2 10 JX
J2 12 1 10 JX J2 12 1 10 JX
R2 6 9 100E3 R2 6 9 100E3
RD1 4 11 3.536E3 RD1 4 11 3.536E3
RD2 4 12 3.536E3 RD2 4 12 3.536E3
RO1 8 5 150 RO1 8 5 150
RO2 7 99 150 RO2 7 99 150
RP 3 4 2.143E3 RP 3 4 2.143E3
RSS 10 99 1.026E6 RSS 10 99 1.026E6
VB 9 0 DC 0 VB 9 0 DC 0
VC 3 53 DC 2.2 VC 3 53 DC 2.2
VE 54 4 DC 2.2 VE 54 4 DC 2.2
VLIM 7 8 DC 0 VLIM 7 8 DC 0
VLP 91 0 DC 25 VLP 91 0 DC 25
VLN 0 92 DC 25 VLN 0 92 DC 25
.MODEL DX D(IS=800E-18) .MODEL DX D(IS=800E-18)
.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1) .MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
.ENDS TL074 .ENDS TL074
*2N2907 MCE 5-27-97 *2N2907 MCE 5-27-97
*Ref: Motorola Small-Signal Device databook, Q4/94 *Ref: Motorola Small-Signal Device databook, Q4/94
*Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1 *Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1
.MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2 .MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2
+ BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5 + BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5
+ CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N) + CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N)
.END .END

View File

@@ -1,10 +1,10 @@
Output: Mixed Sim Output: Mixed Sim
Type : AdvSimNetlist Type : AdvSimNetlist
From : Project [Log_Amp_Transistor.PrjPcb] From : Project [Log_Amp_Transistor.PrjPcb]
Generated File[Log_Amp_Transistor.nsx] Generated File[Log_Amp_Transistor.nsx]
Files Generated : 1 Files Generated : 1
Documents Printed : 0 Documents Printed : 0
Finished Output Generation At 17:29:55 On 11.11.2025 Finished Output Generation At 17:29:55 On 11.11.2025

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

View File

@@ -1 +1 @@
Record=TopLevelDocument|FileName=Push_Pull_Stage.SchDoc|SheetNumber=1 Record=TopLevelDocument|FileName=Push_Pull_Stage.SchDoc|SheetNumber=1

View File

@@ -1,116 +1,116 @@
ETOTH-Push_Pull_Stage ETOTH-Push_Pull_Stage
*SPICE Netlist generated by Advanced Sim server on 18.11.2025 18:00:32 *SPICE Netlist generated by Advanced Sim server on 18.11.2025 18:00:32
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
CC_VCM1 VCM 0 {C} CC_VCM1 VCM 0 {C}
CC_VCM2 VAP VCM {C} CC_VCM2 VAP VCM {C}
XIC1A NetIC1_3 U_Out_a VAP 0 NetIC1_1 TL074 XIC1A NetIC1_3 U_Out_a VAP 0 NetIC1_1 TL074
XIC1C NetIC1_10 NetIC1_9 VAP 0 NetIC1_8 TL074 XIC1C NetIC1_10 NetIC1_9 VAP 0 NetIC1_8 TL074
RR_npn_a VAP NetR_npn_a_2 580R RR_npn_a VAP NetR_npn_a_2 580R
RR_pnp_a NetR_pnp_a_1 0 575R RR_pnp_a NetR_pnp_a_1 0 575R
RR_rs1 NetIC1_10 VAP 470k RR_rs1 NetIC1_10 VAP 470k
RR_rs2 0 NetIC1_10 470k RR_rs2 0 NetIC1_10 470k
RR_speaker U_Out_a VCM 8R RR_speaker U_Out_a VCM 8R
RR_vor_src_a NetR_vor_src_a_1 NetIC1_1 402.07R RR_vor_src_a NetR_vor_src_a_1 NetIC1_1 402.07R
RR_vor_src_b NetR_vor_src_b_1 NetR_vor_src_a_1 404.15R RR_vor_src_b NetR_vor_src_b_1 NetR_vor_src_a_1 404.15R
QT1_a VAP NetIC1_1 U_Out_a BD135_137_139 QT1_a VAP NetIC1_1 U_Out_a BD135_137_139
QT1_b 0 NetR_vor_src_b_1 U_Out_a BD136_138_140 QT1_b 0 NetR_vor_src_b_1 U_Out_a BD136_138_140
QT_npn_a NetR_npn_a_2 NetR_npn_a_2 0 2N2222 QT_npn_a NetR_npn_a_2 NetR_npn_a_2 0 2N2222
QT_npn_b NetR_vor_src_b_1 NetR_npn_a_2 0 2N2222 QT_npn_b NetR_vor_src_b_1 NetR_npn_a_2 0 2N2222
QT_pnp_a NetR_pnp_a_1 NetR_pnp_a_1 VAP 2N2907 QT_pnp_a NetR_pnp_a_1 NetR_pnp_a_1 VAP 2N2907
QT_pnp_b NetIC1_1 NetR_pnp_a_1 VAP 2N2907 QT_pnp_b NetIC1_1 NetR_pnp_a_1 VAP 2N2907
QT_rsN 0 NetIC1_8 NetIC1_9 2N2907 QT_rsN 0 NetIC1_8 NetIC1_9 2N2907
QT_rsP VAP NetIC1_8 NetIC1_9 2N2222 QT_rsP VAP NetIC1_8 NetIC1_9 2N2222
QT_vor_src_a NetIC1_1 NetR_vor_src_a_1 NetR_vor_src_b_1 2N2222 QT_vor_src_a NetIC1_1 NetR_vor_src_a_1 NetR_vor_src_b_1 2N2222
VU_q VAP 0 10V VU_q VAP 0 10V
VU_VCM_CURRENT VCM NetIC1_9 0 VU_VCM_CURRENT VCM NetIC1_9 0
VUin_a NetIC1_3 VCM DC 0 SIN(0 2.7V 440Hz 0 0 0) AC 1 0 VUin_a NetIC1_3 VCM DC 0 SIN(0 2.7V 440Hz 0 0 0) AC 1 0
.PLOT TRAN {v(Uin_a)} =PLOT(1) =AXIS(1) =NAME(Uin) =UNITS(V) .PLOT TRAN {v(Uin_a)} =PLOT(1) =AXIS(1) =NAME(Uin) =UNITS(V)
.PLOT TRAN {v(R_speaker)} =PLOT(1) =AXIS(1) =NAME(U_Out) =UNITS(V) .PLOT TRAN {v(R_speaker)} =PLOT(1) =AXIS(1) =NAME(U_Out) =UNITS(V)
.PLOT TRAN {i(R_speaker)} =PLOT(2) =AXIS(1) =NAME(i_Speaker) =UNITS(A) .PLOT TRAN {i(R_speaker)} =PLOT(2) =AXIS(1) =NAME(i_Speaker) =UNITS(A)
.PLOT TRAN {p(R_speaker)} =PLOT(3) =AXIS(1) =NAME(P_speaker) =UNITS(W) .PLOT TRAN {p(R_speaker)} =PLOT(3) =AXIS(1) =NAME(P_speaker) =UNITS(W)
.PLOT TRAN {i(U_VCM_CURRENT)} =PLOT(4) =AXIS(1) =NAME(I_VCM) =UNITS(A) .PLOT TRAN {i(U_VCM_CURRENT)} =PLOT(4) =AXIS(1) =NAME(I_VCM) =UNITS(A)
.PLOT TRAN {v(VCM)} =PLOT(4) =AXIS(2) =NAME(U_VCM) =UNITS(V) .PLOT TRAN {v(VCM)} =PLOT(4) =AXIS(2) =NAME(U_VCM) =UNITS(V)
.PLOT TRAN {v(VCM)*I(U_VCM_CURRENT)} =PLOT(4) =AXIS(3) =NAME(P_VCM) =UNITS(W) .PLOT TRAN {v(VCM)*I(U_VCM_CURRENT)} =PLOT(4) =AXIS(3) =NAME(P_VCM) =UNITS(W)
.OPTIONS VNTOL=1e-4 .OPTIONS VNTOL=1e-4
*Selected Circuit Analyses: *Selected Circuit Analyses:
.TRAN 50u 20m 0 50u .TRAN 50u 20m 0 50u
*Global Parameters: *Global Parameters:
.PARAM C={100u} .PARAM C={100u}
*Models and Subcircuits: *Models and Subcircuits:
*TL074 *TL074
*Quad LoNoise JFETInput OpAmp pkg:DIP14 *Quad LoNoise JFETInput OpAmp pkg:DIP14
*+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14) *+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14)
* Connections: * Connections:
* Non-Inverting Input * Non-Inverting Input
* | Inverting Input * | Inverting Input
* | | Positive Power Supply * | | Positive Power Supply
* | | | Negative Power Supply * | | | Negative Power Supply
* | | | | Output * | | | | Output
* | | | | | * | | | | |
.SUBCKT TL074 1 2 3 4 5 .SUBCKT TL074 1 2 3 4 5
C1 11 12 3.498E-12 C1 11 12 3.498E-12
C2 6 7 15E-12 C2 6 7 15E-12
DC 5 53 DX DC 5 53 DX
DE 54 5 DX DE 54 5 DX
DLP 90 91 DX DLP 90 91 DX
DLN 92 90 DX DLN 92 90 DX
DP 4 3 DX DP 4 3 DX
BGND 99 0 V=V(3)*.5 + V(4)*.5 BGND 99 0 V=V(3)*.5 + V(4)*.5
BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 + BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
+ I(VLP)*5E6 - I(VLN)*5E6 + I(VLP)*5E6 - I(VLN)*5E6
GA 6 0 11 12 282.8E-6 GA 6 0 11 12 282.8E-6
GCM 0 6 10 99 8.942E-9 GCM 0 6 10 99 8.942E-9
ISS 3 10 DC 195E-6 ISS 3 10 DC 195E-6
HLIM 90 0 VLIM 1K HLIM 90 0 VLIM 1K
J1 11 2 10 JX J1 11 2 10 JX
J2 12 1 10 JX J2 12 1 10 JX
R2 6 9 100E3 R2 6 9 100E3
RD1 4 11 3.536E3 RD1 4 11 3.536E3
RD2 4 12 3.536E3 RD2 4 12 3.536E3
RO1 8 5 150 RO1 8 5 150
RO2 7 99 150 RO2 7 99 150
RP 3 4 2.143E3 RP 3 4 2.143E3
RSS 10 99 1.026E6 RSS 10 99 1.026E6
VB 9 0 DC 0 VB 9 0 DC 0
VC 3 53 DC 2.2 VC 3 53 DC 2.2
VE 54 4 DC 2.2 VE 54 4 DC 2.2
VLIM 7 8 DC 0 VLIM 7 8 DC 0
VLP 91 0 DC 25 VLP 91 0 DC 25
VLN 0 92 DC 25 VLN 0 92 DC 25
.MODEL DX D(IS=800E-18) .MODEL DX D(IS=800E-18)
.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1) .MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
.ENDS TL074 .ENDS TL074
.MODEL BD135_137_139 NPN (IS=2.3985E-13 BF=244.9 NF=1.0 BR=78.11 NR=1.007 .MODEL BD135_137_139 NPN (IS=2.3985E-13 BF=244.9 NF=1.0 BR=78.11 NR=1.007
+ ISE=1.0471E-14 NE=1.2 ISC=1.9314E-11 NC=1.45 VAF=98.5 VAR=7.46 IKF=1.1863 + ISE=1.0471E-14 NE=1.2 ISC=1.9314E-11 NC=1.45 VAF=98.5 VAR=7.46 IKF=1.1863
+ IKR=0.1445 RB=2.14 RBM=0.001 IRB=0.031 RE=0.0832 RC=0.01 CJE=2.92702E-10 + IKR=0.1445 RB=2.14 RBM=0.001 IRB=0.031 RE=0.0832 RC=0.01 CJE=2.92702E-10
+ VJE=0.67412 MJE=0.3300 FC=0.5 CJC=4.8831E-11 VJC=0.5258 MJC=0.3928 + VJE=0.67412 MJE=0.3300 FC=0.5 CJC=4.8831E-11 VJC=0.5258 MJC=0.3928
+ XCJC =0.5287 XTB=1.1398 EG=1.2105 XTI=3.0 ) + XCJC =0.5287 XTB=1.1398 EG=1.2105 XTI=3.0 )
.MODEL BD136_138_140 PNP (IS=2.9537E-13 BF=201.4 NF=1.0 BR=23.765 .MODEL BD136_138_140 PNP (IS=2.9537E-13 BF=201.4 NF=1.0 BR=23.765
+ NR=1.021 ISE=1.8002E-13 NE=1.5 ISC=7.0433E-12 NC=1.38 VAF=137.0 + NR=1.021 ISE=1.8002E-13 NE=1.5 ISC=7.0433E-12 NC=1.38 VAF=137.0
+ VAR=8.41 IKF=1.0993 IKR=0.10 RB=1.98 RBM=0.01 IRB=0.011 RE=0.1109 + VAR=8.41 IKF=1.0993 IKR=0.10 RB=1.98 RBM=0.01 IRB=0.011 RE=0.1109
+ RC=0.01 CJE=2.1982E-10 VJE=0.7211 MJE=0.3685 FC=0.5 CJC=6.8291E-11 + RC=0.01 CJE=2.1982E-10 VJE=0.7211 MJE=0.3685 FC=0.5 CJC=6.8291E-11
+ VJC=0.5499 MJC=0.3668 XCJC=0.5287 XTB=1.4883 EG=1.2343 XTI=3.0) + VJC=0.5499 MJC=0.3668 XCJC=0.5287 XTB=1.4883 EG=1.2343 XTI=3.0)
*2N2222 MCE 5-20-97 *2N2222 MCE 5-20-97
*Ref: Motorola Small-Signal Device Databook, Q4/94 *Ref: Motorola Small-Signal Device Databook, Q4/94
*Si 400mW 30V 800mA 300MHz GenPurp pkg:TO-18 3,2,1 *Si 400mW 30V 800mA 300MHz GenPurp pkg:TO-18 3,2,1
.MODEL 2N2222 NPN (IS=81.2F NF=1 BF=195 VAF=98.6 IKF=0.48 ISE=53.7P NE=2 .MODEL 2N2222 NPN (IS=81.2F NF=1 BF=195 VAF=98.6 IKF=0.48 ISE=53.7P NE=2
+ BR=4 NR=1 VAR=20 IKR=0.72 RE=64.4M RB=0.258 RC=25.8M XTB=1.5 + BR=4 NR=1 VAR=20 IKR=0.72 RE=64.4M RB=0.258 RC=25.8M XTB=1.5
+ CJE=89.5P VJE=1.1 MJE=0.5 CJC=28.9P VJC=0.3 MJC=0.3 TF=530P TR=368N) + CJE=89.5P VJE=1.1 MJE=0.5 CJC=28.9P VJC=0.3 MJC=0.3 TF=530P TR=368N)
*2N2907 MCE 5-27-97 *2N2907 MCE 5-27-97
*Ref: Motorola Small-Signal Device databook, Q4/94 *Ref: Motorola Small-Signal Device databook, Q4/94
*Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1 *Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1
.MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2 .MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2
+ BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5 + BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5
+ CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N) + CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N)
.END .END

View File

@@ -1,10 +1,10 @@
Output: Mixed Sim Output: Mixed Sim
Type : AdvSimNetlist Type : AdvSimNetlist
From : Project [ETOTH-Push_Pull_Stage.PrjPcb] From : Project [ETOTH-Push_Pull_Stage.PrjPcb]
Generated File[ETOTH-Push_Pull_Stage.nsx] Generated File[ETOTH-Push_Pull_Stage.nsx]
Files Generated : 1 Files Generated : 1
Documents Printed : 0 Documents Printed : 0
Finished Output Generation At 17:22:58 On 18.11.2025 Finished Output Generation At 17:22:58 On 18.11.2025

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

View File

@@ -1,10 +1,10 @@
Output: Mixed Sim Output: Mixed Sim
Type : AdvSimNetlist Type : AdvSimNetlist
From : Project [TRI-SQR-VCO_OTA.PrjPcb] From : Project [TRI-SQR-VCO_OTA.PrjPcb]
Generated File[TRI-SQR-VCO_OTA.nsx] Generated File[TRI-SQR-VCO_OTA.nsx]
Files Generated : 1 Files Generated : 1
Documents Printed : 0 Documents Printed : 0
Finished Output Generation At 16:32:06 On 16.09.2025 Finished Output Generation At 16:32:06 On 16.09.2025

View File

@@ -1,229 +1,229 @@
TRI-SQR-VCO_OTA TRI-SQR-VCO_OTA
*SPICE Netlist generated by Advanced Sim server on 11.11.2025 14:51:04 *SPICE Netlist generated by Advanced Sim server on 11.11.2025 14:51:04
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
CC NetC_1 0 4.9645nF CC NetC_1 0 4.9645nF
CC_an NetC_an_1 NetC_an_2 1nF CC_an NetC_an_1 NetC_an_2 1nF
XIC1A NetIC1_16 NetIC1_15 U_SQR_OTA 0 NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1A_9 XIC1A NetIC1_16 NetIC1_15 U_SQR_OTA 0 NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1A_9
+ ExtraNet_XIC1A_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL + ExtraNet_XIC1A_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL
XIC1B NetIC1_16 NetIC1_15 U_SQR_OTA 0 NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1B_9 XIC1B NetIC1_16 NetIC1_15 U_SQR_OTA 0 NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1B_9
+ ExtraNet_XIC1B_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL + ExtraNet_XIC1B_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL
XIC1C NetIC1_16 NetIC1_15 U_SQR_OTA 0 NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1C_9 XIC1C NetIC1_16 NetIC1_15 U_SQR_OTA 0 NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1C_9
+ ExtraNet_XIC1C_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL + ExtraNet_XIC1C_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL
XIC1E NetIC1_16 NetIC1_15 U_SQR_OTA 0 NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1E_9 XIC1E NetIC1_16 NetIC1_15 U_SQR_OTA 0 NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1E_9
+ ExtraNet_XIC1E_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL + ExtraNet_XIC1E_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL
XIC2A U_SQR_OTA U_SQR Vcc Vee U_SQR TL074 XIC2A U_SQR_OTA U_SQR Vcc Vee U_SQR TL074
XIC2B 0 NetC_an_1 Vcc Vee NetIC2_7 TL074 XIC2B 0 NetC_an_1 Vcc Vee NetIC2_7 TL074
XIC2C 0 NetIC2_9 Vcc Vee U_C TL074 XIC2C 0 NetIC2_9 Vcc Vee U_C TL074
XIC2D NetIC2_12 NetIC2_13 Vcc Vee U_SAW TL074 XIC2D NetIC2_12 NetIC2_13 Vcc Vee U_SAW TL074
XIC3A 0 NetIC3_2 Vcc Vee U_in TL074 XIC3A 0 NetIC3_2 Vcc Vee U_in TL074
XIC3B U_SAW NetIC3_6 Vcc Vee NetIC3_7 TL074 XIC3B U_SAW NetIC3_6 Vcc Vee NetIC3_7 TL074
RR2 Vee U_TRI 20k RR2 Vee U_TRI 20k
RR3 Vcc NetIC1_1 16.9k RR3 Vcc NetIC1_1 16.9k
RR4a NetIC3_2 U_TRI 100k RR4a NetIC3_2 U_TRI 100k
RR4b U_in NetIC3_2 56k RR4b U_in NetIC3_2 56k
RR_A 0 U_SQR_OTA 4.7k RR_A 0 U_SQR_OTA 4.7k
RR_CV NetR_CV_1 NetIC2_9 59.941k RR_CV NetR_CV_1 NetIC2_9 59.941k
RR_E NetC_an_2 NetR_E_2 20k RR_E NetC_an_2 NetR_E_2 20k
RR_goofer NetR_goofer_1 NetIC3_2 1Meg RR_goofer NetR_goofer_1 NetIC3_2 1Meg
RR_lambda_T NetIC2_9 U_C 1.1k RR_lambda_T NetIC2_9 U_C 1.1k
RR_PWM_a Vee NetIC3_6 15k RR_PWM_a Vee NetIC3_6 15k
RR_PWM_b NetIC3_6 Vcc 10k RR_PWM_b NetIC3_6 Vcc 10k
RR_PWM_c U_PWM NetIC3_7 1k RR_PWM_c U_PWM NetIC3_7 1k
RR_PWM_d 0 U_PWM 2k RR_PWM_d 0 U_PWM 2k
RR_ref NetC_an_1 Vee 524.8k RR_ref NetC_an_1 Vee 524.8k
RR_SAW_a NetIC2_13 U_in 10k RR_SAW_a NetIC2_13 U_in 10k
RR_SAW_b NetIC2_12 U_in 10k RR_SAW_b NetIC2_12 U_in 10k
RR_SAW_c U_SAW NetIC2_13 10k RR_SAW_c U_SAW NetIC2_13 10k
RR_SAW_d 0 U_SAW 1k RR_SAW_d 0 U_SAW 1k
RR_SAW_e U_SQR NetR_SAW_e_2 33k RR_SAW_e U_SQR NetR_SAW_e_2 33k
RR_trim_a NetR_goofer_1 Vee 50k RR_trim_a NetR_goofer_1 Vee 50k
RR_trim_b Vcc NetR_goofer_1 50k RR_trim_b Vcc NetR_goofer_1 50k
RRoff NetIC3_2 Vee 216.67k RRoff NetIC3_2 Vee 216.67k
QT1 NetC_an_1 0 NetC_an_2 2N2907 QT1 NetC_an_1 0 NetC_an_2 2N2907
QT2 NetT2_3 U_C NetC_an_2 2N2907 QT2 NetT2_3 U_C NetC_an_2 2N2907
JT_SAW 0 NetR_SAW_e_2 NetIC2_12 BF256B JT_SAW 0 NetR_SAW_e_2 NetIC2_12 BF256B
VU_mess NetT2_3 NetIC1_16 0 VU_mess NetT2_3 NetIC1_16 0
VU_messref NetR_E_2 NetIC2_7 0 VU_messref NetR_E_2 NetIC2_7 0
VU_neg 0 Vee +5V VU_neg 0 Vee +5V
VU_pos Vcc 0 +5V VU_pos Vcc 0 +5V
VU_var NetR_CV_1 0 1 VU_var NetR_CV_1 0 1
.PLOT TRAN {v(U_SQR)} =PLOT(1) =AXIS(1) =NAME(U_SQR) =UNITS(V) .PLOT TRAN {v(U_SQR)} =PLOT(1) =AXIS(1) =NAME(U_SQR) =UNITS(V)
.PLOT TRAN {v(U_TRI)} =PLOT(2) =AXIS(1) =NAME(U_TRI) =UNITS(V) .PLOT TRAN {v(U_TRI)} =PLOT(2) =AXIS(1) =NAME(U_TRI) =UNITS(V)
.PLOT TRAN {v(U_SAW)} =PLOT(3) =AXIS(1) =NAME(U_SAW) =UNITS(V) .PLOT TRAN {v(U_SAW)} =PLOT(3) =AXIS(1) =NAME(U_SAW) =UNITS(V)
.PLOT TRAN {v(U_PWM)} =PLOT(4) =AXIS(1) =NAME(U_PWM) =UNITS(V) .PLOT TRAN {v(U_PWM)} =PLOT(4) =AXIS(1) =NAME(U_PWM) =UNITS(V)
*Selected Circuit Analyses: *Selected Circuit Analyses:
.TRAN 45u 20m 10m 45u .TRAN 45u 20m 10m 45u
*Models and Subcircuits: *Models and Subcircuits:
* A dual opamp ngspice model * A dual opamp ngspice model
* file name: LM13700-DUAL.ckt * file name: LM13700-DUAL.ckt
.subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+ .subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+
+ 2out 2in- 2in+ 2Dbias 2ABin + 2out 2in- 2in+ 2Dbias 2ABin
*////////////////////////////////////////////////////////////////////// *//////////////////////////////////////////////////////////////////////
* (C) National Semiconductor, Inc. * (C) National Semiconductor, Inc.
* Models developed and under copyright by: * Models developed and under copyright by:
* National Semiconductor, Inc. * National Semiconductor, Inc.
*///////////////////////////////////////////////////////////////////// */////////////////////////////////////////////////////////////////////
* Legal Notice: This material is intended for free software support. * Legal Notice: This material is intended for free software support.
* The file may be copied, and distributed; however, reselling the * The file may be copied, and distributed; however, reselling the
* material is illegal * material is illegal
*//////////////////////////////////////////////////////////////////// *////////////////////////////////////////////////////////////////////
* For ordering or technical information on these models, contact: * For ordering or technical information on these models, contact:
* National Semiconductor's Customer Response Center * National Semiconductor's Customer Response Center
* 7:00 A.M.--7:00 P.M. U.S. Central Time * 7:00 A.M.--7:00 P.M. U.S. Central Time
* (800) 272-9959 * (800) 272-9959
* For Applications support, contact the Internet address: * For Applications support, contact the Internet address:
* amps-apps@galaxy.nsc.com * amps-apps@galaxy.nsc.com
* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ * \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
* LM13700 Dual Operational Transconductance Amplifier * LM13700 Dual Operational Transconductance Amplifier
* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ * \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
* *
* Amplifier Bias Input * Amplifier Bias Input
* | Diode Bias * | Diode Bias
* | | Positive Input * | | Positive Input
* | | | Negative Input * | | | Negative Input
* | | | | Output * | | | | Output
* | | | | | Negative power supply * | | | | | Negative power supply
* | | | | | | Buffer Input * | | | | | | Buffer Input
* | | | | | | | Buffer Output * | | | | | | | Buffer Output
* | | | | | | | | Positive power supply * | | | | | | | | Positive power supply
* | | | | | | | | | * | | | | | | | | |
.SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11 .SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11
* *
* Features: * Features:
* gm adjustable over 6 decades. * gm adjustable over 6 decades.
* Excellent gm linearity. * Excellent gm linearity.
* Linearizing diodes. * Linearizing diodes.
* Wide supply range of +/-2V to +/-22V. * Wide supply range of +/-2V to +/-22V.
* *
* Note: This model is single-pole in nature and over-estimates * Note: This model is single-pole in nature and over-estimates
* AC bandwidth and phase margin (stability) by over 2X. * AC bandwidth and phase margin (stability) by over 2X.
* Although refinement may be possible in the future, please * Although refinement may be possible in the future, please
* use benchtesting to finalize AC circuit design. * use benchtesting to finalize AC circuit design.
* *
* Note: Model is for single device only and simulated * Note: Model is for single device only and simulated
* supply current is 1/2 of total device current. * supply current is 1/2 of total device current.
* *
****************************************************** ******************************************************
* *
C1 6 4 4.8P C1 6 4 4.8P
C2 3 6 4.8P C2 3 6 4.8P
* Output capacitor * Output capacitor
C3 5 6 6.26P C3 5 6 6.26P
D1 2 4 DX D1 2 4 DX
D2 2 3 DX D2 2 3 DX
D3 11 21 DX D3 11 21 DX
D4 21 22 DX D4 21 22 DX
D5 1 26 DX D5 1 26 DX
D6 26 27 DX D6 26 27 DX
D7 5 29 DX D7 5 29 DX
D8 28 5 DX D8 28 5 DX
D10 31 25 DX D10 31 25 DX
* Clamp for -CMR * Clamp for -CMR
D11 28 25 DX D11 28 25 DX
* Ios source * Ios source
F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9 F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9
F2 11 5 V2 1.022 F2 11 5 V2 1.022
F3 25 6 V3 1.0 F3 25 6 V3 1.0
F4 5 6 V1 1.022 F4 5 6 V1 1.022
* Output impedance * Output impedance
F5 5 0 POLY(2) V3 V7 0 0 0 0 1 F5 5 0 POLY(2) V3 V7 0 0 0 0 1
G1 0 33 5 0 .55E-3 G1 0 33 5 0 .55E-3
I1 11 6 300U I1 11 6 300U
Q1 24 32 31 QX1 Q1 24 32 31 QX1
Q2 23 3 31 QX2 Q2 23 3 31 QX2
Q3 11 7 30 QZ Q3 11 7 30 QZ
Q4 11 30 8 QY Q4 11 30 8 QY
V1 22 24 0V V1 22 24 0V
V2 22 23 0V V2 22 23 0V
V3 27 6 0V V3 27 6 0V
V4 11 29 1.4 V4 11 29 1.4
V5 28 6 1.2 V5 28 6 1.2
V6 4 32 0V V6 4 32 0V
V7 33 0 0V V7 33 0 0V
.MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2) .MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2) .MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QY NPN (IS=6E-15 BF=50) .MODEL QY NPN (IS=6E-15 BF=50)
.MODEL QZ NPN (IS=5E-16 BF=266) .MODEL QZ NPN (IS=5E-16 BF=266)
.MODEL DX D (IS=5E-16) .MODEL DX D (IS=5E-16)
.ENDS .ENDS
*$ *$
XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS
XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS
.ends .ends
*TL074 *TL074
*Quad LoNoise JFETInput OpAmp pkg:DIP14 *Quad LoNoise JFETInput OpAmp pkg:DIP14
*+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14) *+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14)
* Connections: * Connections:
* Non-Inverting Input * Non-Inverting Input
* | Inverting Input * | Inverting Input
* | | Positive Power Supply * | | Positive Power Supply
* | | | Negative Power Supply * | | | Negative Power Supply
* | | | | Output * | | | | Output
* | | | | | * | | | | |
.SUBCKT TL074 1 2 3 4 5 .SUBCKT TL074 1 2 3 4 5
C1 11 12 3.498E-12 C1 11 12 3.498E-12
C2 6 7 15E-12 C2 6 7 15E-12
DC 5 53 DX DC 5 53 DX
DE 54 5 DX DE 54 5 DX
DLP 90 91 DX DLP 90 91 DX
DLN 92 90 DX DLN 92 90 DX
DP 4 3 DX DP 4 3 DX
BGND 99 0 V=V(3)*.5 + V(4)*.5 BGND 99 0 V=V(3)*.5 + V(4)*.5
BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 + BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
+ I(VLP)*5E6 - I(VLN)*5E6 + I(VLP)*5E6 - I(VLN)*5E6
GA 6 0 11 12 282.8E-6 GA 6 0 11 12 282.8E-6
GCM 0 6 10 99 8.942E-9 GCM 0 6 10 99 8.942E-9
ISS 3 10 DC 195E-6 ISS 3 10 DC 195E-6
HLIM 90 0 VLIM 1K HLIM 90 0 VLIM 1K
J1 11 2 10 JX J1 11 2 10 JX
J2 12 1 10 JX J2 12 1 10 JX
R2 6 9 100E3 R2 6 9 100E3
RD1 4 11 3.536E3 RD1 4 11 3.536E3
RD2 4 12 3.536E3 RD2 4 12 3.536E3
RO1 8 5 150 RO1 8 5 150
RO2 7 99 150 RO2 7 99 150
RP 3 4 2.143E3 RP 3 4 2.143E3
RSS 10 99 1.026E6 RSS 10 99 1.026E6
VB 9 0 DC 0 VB 9 0 DC 0
VC 3 53 DC 2.2 VC 3 53 DC 2.2
VE 54 4 DC 2.2 VE 54 4 DC 2.2
VLIM 7 8 DC 0 VLIM 7 8 DC 0
VLP 91 0 DC 25 VLP 91 0 DC 25
VLN 0 92 DC 25 VLN 0 92 DC 25
.MODEL DX D(IS=800E-18) .MODEL DX D(IS=800E-18)
.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1) .MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
.ENDS TL074 .ENDS TL074
*2N2907 MCE 5-27-97 *2N2907 MCE 5-27-97
*Ref: Motorola Small-Signal Device databook, Q4/94 *Ref: Motorola Small-Signal Device databook, Q4/94
*Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1 *Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1
.MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2 .MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2
+ BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5 + BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5
+ CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N) + CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N)
*PHILIPS SEMICONDUCTORS Version: 1.0 *PHILIPS SEMICONDUCTORS Version: 1.0
*Filename: bf256a_bf256b_philips *Filename: bf256a_bf256b_philips
* *
.MODEL BF256B NJF .MODEL BF256B NJF
+( +(
+ VTO = -2.3085E+000 + VTO = -2.3085E+000
+ BETA = 1.09045E-003 + BETA = 1.09045E-003
+ LAMBDA = 2.31754E-002 + LAMBDA = 2.31754E-002
+ RD = 7.77648E+000 + RD = 7.77648E+000
+ RS = 7.77648E+000 + RS = 7.77648E+000
+ IS = 2.59121E-016 + IS = 2.59121E-016
+ CGS = 2.00000E-012 + CGS = 2.00000E-012
+ CGD = 2.20000E-012 + CGD = 2.20000E-012
+ PB = 9.91494E-001 + PB = 9.91494E-001
+ FC = 5.00000E-001 + FC = 5.00000E-001
+) +)
.END .END

View File

@@ -1,288 +1,288 @@
SDF: 1.0 SDF: 1.0
TotalPoints: 0 TotalPoints: 0
#ChartSetupsBegin #ChartSetupsBegin
Chart: Transient Analysis Chart: Transient Analysis
ChartId: SXLHKXUU ChartId: SXLHKXUU
ChartView: 4 ChartView: 4
ChartTitle: Transient Analysis ChartTitle: Transient Analysis
ChartBackgroundColor: 16777215 ChartBackgroundColor: 16777215
ChartForegroundColor: 0 ChartForegroundColor: 0
ChartGridColor: 0 ChartGridColor: 0
ChartXDivisions: 10 ChartXDivisions: 10
ChartXOffset: 0.00000000000000E+000 ChartXOffset: 0.00000000000000E+000
ChartXDivSize: 1.00000000000000E-003 ChartXDivSize: 1.00000000000000E-003
ChartXMin: 1.00000000000000E-002 ChartXMin: 1.00000000000000E-002
ChartXMax: 2.00000000000000E-002 ChartXMax: 2.00000000000000E-002
ChartAutoXMin: TRUE ChartAutoXMin: TRUE
ChartAutoXMax: TRUE ChartAutoXMax: TRUE
ChartAutoXDiv TRUE ChartAutoXDiv TRUE
ChartUseXDefaults: FALSE ChartUseXDefaults: FALSE
ChartXDataType: 0 ChartXDataType: 0
ChartPrimaryYDataType: 0 ChartPrimaryYDataType: 0
ChartXScaleMode: 0 ChartXScaleMode: 0
ChartXScaleLogBase: 10 ChartXScaleLogBase: 10
ChartYScaleMode: 0 ChartYScaleMode: 0
ChartBoldWaves: TRUE ChartBoldWaves: TRUE
ChartHighlightSimilarWaves: TRUE ChartHighlightSimilarWaves: TRUE
ChartShowDataPoints: FALSE ChartShowDataPoints: FALSE
ChartShowWaveSymbols: FALSE ChartShowWaveSymbols: FALSE
ChartShowChartTitle: TRUE ChartShowChartTitle: TRUE
ChartShowPlotTitle: TRUE ChartShowPlotTitle: TRUE
ChartShowAxisLabels: TRUE ChartShowAxisLabels: TRUE
ChartSimDataPanel: FALSE ChartSimDataPanel: FALSE
ChartZoomPlotsSeparately: TRUE ChartZoomPlotsSeparately: TRUE
ChartFFTLength: 128 ChartFFTLength: 128
ChartDisplayMeasurements: FALSE ChartDisplayMeasurements: FALSE
ChartCursorDisplay_AcRms: FALSE ChartCursorDisplay_AcRms: FALSE
ChartCursorDisplay_RMS: FALSE ChartCursorDisplay_RMS: FALSE
ChartCursorDisplay_Average: FALSE ChartCursorDisplay_Average: FALSE
ChartCursorDisplay_BminusA: FALSE ChartCursorDisplay_BminusA: FALSE
ChartCursorDisplay_Frequency: TRUE ChartCursorDisplay_Frequency: TRUE
ChartCursorDisplay_Maximum: FALSE ChartCursorDisplay_Maximum: FALSE
ChartCursorDisplay_Minimum: FALSE ChartCursorDisplay_Minimum: FALSE
ChartCursorDisplay_RMS: FALSE ChartCursorDisplay_RMS: FALSE
ChartCursorDisplay_XY: TRUE ChartCursorDisplay_XY: TRUE
ChartFourier: FALSE ChartFourier: FALSE
ChartTable: FALSE ChartTable: FALSE
ChartType: XY Scatter ChartType: XY Scatter
ChartXUnitStr: s ChartXUnitStr: s
ChartXLabel: Time ChartXLabel: Time
ChartRelatedChartId: ChartRelatedChartId:
ChartDeltaItem: 0 ChartDeltaItem: 0
Cell: 0 Cell: 0
CellHeight: 520 CellHeight: 520
CellIsScaled: TRUE CellIsScaled: TRUE
CellIsDigital: FALSE CellIsDigital: FALSE
CellIsPartial: FALSE CellIsPartial: FALSE
CellTitle CellTitle
CellXGrid: TRUE CellXGrid: TRUE
CellYGrid: TRUE CellYGrid: TRUE
CellMinorGrid: TRUE CellMinorGrid: TRUE
CellGridStyle: 0 CellGridStyle: 0
CellAxisDivisions: 4 CellAxisDivisions: 4
CellAxisLabel: CellAxisLabel:
CellAxisUnits: CellAxisUnits:
CellAxisAutoMin: TRUE CellAxisAutoMin: TRUE
CellAxisAutoMax: TRUE CellAxisAutoMax: TRUE
CellAxisAutoDiv: TRUE CellAxisAutoDiv: TRUE
CellAxisAutoUnits: TRUE CellAxisAutoUnits: TRUE
CellAxisDivSize: 1.00000000000000E+014 CellAxisDivSize: 1.00000000000000E+014
CellAxisOffset: -1.00100300000000E+020 CellAxisOffset: -1.00100300000000E+020
CellAxisScaleMode: 0 CellAxisScaleMode: 0
CellAxisLogScaleBase: 10 CellAxisLogScaleBase: 10
WaveName: U_SQR WaveName: U_SQR
WaveEq: v(U_SQR) WaveEq: v(U_SQR)
WaveColor: 3425735 WaveColor: 3425735
WaveYUnitStr: V WaveYUnitStr: V
CellSelectedAxis: 0 CellSelectedAxis: 0
CellXAxisDivisions: 10 CellXAxisDivisions: 10
CellXAxisLabel: Time CellXAxisLabel: Time
CellXAxisUnits: s CellXAxisUnits: s
CellXAxisAutoMin: TRUE CellXAxisAutoMin: TRUE
CellXAxisAutoMax: TRUE CellXAxisAutoMax: TRUE
CellXAxisAutoDiv: TRUE CellXAxisAutoDiv: TRUE
CellXAxisAutoLabel TRUE CellXAxisAutoLabel TRUE
CellXAxisAutoUnits: TRUE CellXAxisAutoUnits: TRUE
CellXAxisDivSize: 1.00000000000000E-003 CellXAxisDivSize: 1.00000000000000E-003
CellXAxisOffset: 0.00000000000000E+000 CellXAxisOffset: 0.00000000000000E+000
CellXAxisMin: 1.00000000000000E-002 CellXAxisMin: 1.00000000000000E-002
CellXAxisMax: 2.00000000000000E-002 CellXAxisMax: 2.00000000000000E-002
CellXAxisScaleMode: 0 CellXAxisScaleMode: 0
CellXAxisLogScaleBase: 10 CellXAxisLogScaleBase: 10
CellXAxisZoomOffset: 0.00000000000000E+000 CellXAxisZoomOffset: 0.00000000000000E+000
CellXAxisZoomRange: 1.00000000000000E-002 CellXAxisZoomRange: 1.00000000000000E-002
Cell: 1 Cell: 1
CellHeight: 520 CellHeight: 520
CellIsScaled: TRUE CellIsScaled: TRUE
CellIsDigital: FALSE CellIsDigital: FALSE
CellIsPartial: FALSE CellIsPartial: FALSE
CellTitle CellTitle
CellXGrid: TRUE CellXGrid: TRUE
CellYGrid: TRUE CellYGrid: TRUE
CellMinorGrid: TRUE CellMinorGrid: TRUE
CellGridStyle: 0 CellGridStyle: 0
CellAxisDivisions: 4 CellAxisDivisions: 4
CellAxisLabel: CellAxisLabel:
CellAxisUnits: CellAxisUnits:
CellAxisAutoMin: TRUE CellAxisAutoMin: TRUE
CellAxisAutoMax: TRUE CellAxisAutoMax: TRUE
CellAxisAutoDiv: TRUE CellAxisAutoDiv: TRUE
CellAxisAutoUnits: TRUE CellAxisAutoUnits: TRUE
CellAxisDivSize: 1.00000000000000E+014 CellAxisDivSize: 1.00000000000000E+014
CellAxisOffset: -1.00100300000000E+020 CellAxisOffset: -1.00100300000000E+020
CellAxisScaleMode: 0 CellAxisScaleMode: 0
CellAxisLogScaleBase: 10 CellAxisLogScaleBase: 10
WaveName: U_TRI WaveName: U_TRI
WaveEq: v(U_TRI) WaveEq: v(U_TRI)
WaveColor: 11876408 WaveColor: 11876408
WaveYUnitStr: V WaveYUnitStr: V
CellSelectedAxis: 0 CellSelectedAxis: 0
CellXAxisDivisions: 10 CellXAxisDivisions: 10
CellXAxisLabel: Time CellXAxisLabel: Time
CellXAxisUnits: s CellXAxisUnits: s
CellXAxisAutoMin: TRUE CellXAxisAutoMin: TRUE
CellXAxisAutoMax: TRUE CellXAxisAutoMax: TRUE
CellXAxisAutoDiv: TRUE CellXAxisAutoDiv: TRUE
CellXAxisAutoLabel TRUE CellXAxisAutoLabel TRUE
CellXAxisAutoUnits: TRUE CellXAxisAutoUnits: TRUE
CellXAxisDivSize: 1.00000000000000E-003 CellXAxisDivSize: 1.00000000000000E-003
CellXAxisOffset: 0.00000000000000E+000 CellXAxisOffset: 0.00000000000000E+000
CellXAxisMin: 1.00000000000000E-002 CellXAxisMin: 1.00000000000000E-002
CellXAxisMax: 2.00000000000000E-002 CellXAxisMax: 2.00000000000000E-002
CellXAxisScaleMode: 0 CellXAxisScaleMode: 0
CellXAxisLogScaleBase: 10 CellXAxisLogScaleBase: 10
CellXAxisZoomOffset: 0.00000000000000E+000 CellXAxisZoomOffset: 0.00000000000000E+000
CellXAxisZoomRange: 1.00000000000000E-002 CellXAxisZoomRange: 1.00000000000000E-002
Cell: 2 Cell: 2
CellHeight: 520 CellHeight: 520
CellIsScaled: TRUE CellIsScaled: TRUE
CellIsDigital: FALSE CellIsDigital: FALSE
CellIsPartial: FALSE CellIsPartial: FALSE
CellTitle CellTitle
CellXGrid: TRUE CellXGrid: TRUE
CellYGrid: TRUE CellYGrid: TRUE
CellMinorGrid: TRUE CellMinorGrid: TRUE
CellGridStyle: 0 CellGridStyle: 0
CellAxisDivisions: 4 CellAxisDivisions: 4
CellAxisLabel: CellAxisLabel:
CellAxisUnits: CellAxisUnits:
CellAxisAutoMin: TRUE CellAxisAutoMin: TRUE
CellAxisAutoMax: TRUE CellAxisAutoMax: TRUE
CellAxisAutoDiv: TRUE CellAxisAutoDiv: TRUE
CellAxisAutoUnits: TRUE CellAxisAutoUnits: TRUE
CellAxisDivSize: 1.00000000000000E+014 CellAxisDivSize: 1.00000000000000E+014
CellAxisOffset: -1.00100300000000E+020 CellAxisOffset: -1.00100300000000E+020
CellAxisScaleMode: 0 CellAxisScaleMode: 0
CellAxisLogScaleBase: 10 CellAxisLogScaleBase: 10
WaveName: U_SAW WaveName: U_SAW
WaveEq: v(U_SAW) WaveEq: v(U_SAW)
WaveColor: 2790954 WaveColor: 2790954
WaveYUnitStr: V WaveYUnitStr: V
CellSelectedAxis: 0 CellSelectedAxis: 0
CellXAxisDivisions: 10 CellXAxisDivisions: 10
CellXAxisLabel: Time CellXAxisLabel: Time
CellXAxisUnits: s CellXAxisUnits: s
CellXAxisAutoMin: TRUE CellXAxisAutoMin: TRUE
CellXAxisAutoMax: TRUE CellXAxisAutoMax: TRUE
CellXAxisAutoDiv: TRUE CellXAxisAutoDiv: TRUE
CellXAxisAutoLabel TRUE CellXAxisAutoLabel TRUE
CellXAxisAutoUnits: TRUE CellXAxisAutoUnits: TRUE
CellXAxisDivSize: 1.00000000000000E-003 CellXAxisDivSize: 1.00000000000000E-003
CellXAxisOffset: 0.00000000000000E+000 CellXAxisOffset: 0.00000000000000E+000
CellXAxisMin: 1.00000000000000E-002 CellXAxisMin: 1.00000000000000E-002
CellXAxisMax: 2.00000000000000E-002 CellXAxisMax: 2.00000000000000E-002
CellXAxisScaleMode: 0 CellXAxisScaleMode: 0
CellXAxisLogScaleBase: 10 CellXAxisLogScaleBase: 10
CellXAxisZoomOffset: 0.00000000000000E+000 CellXAxisZoomOffset: 0.00000000000000E+000
CellXAxisZoomRange: 1.00000000000000E-002 CellXAxisZoomRange: 1.00000000000000E-002
Cell: 3 Cell: 3
CellHeight: 520 CellHeight: 520
CellIsScaled: TRUE CellIsScaled: TRUE
CellIsDigital: FALSE CellIsDigital: FALSE
CellIsPartial: FALSE CellIsPartial: FALSE
CellTitle CellTitle
CellXGrid: TRUE CellXGrid: TRUE
CellYGrid: TRUE CellYGrid: TRUE
CellMinorGrid: TRUE CellMinorGrid: TRUE
CellGridStyle: 0 CellGridStyle: 0
CellAxisDivisions: 4 CellAxisDivisions: 4
CellAxisLabel: CellAxisLabel:
CellAxisUnits: CellAxisUnits:
CellAxisAutoMin: TRUE CellAxisAutoMin: TRUE
CellAxisAutoMax: TRUE CellAxisAutoMax: TRUE
CellAxisAutoDiv: TRUE CellAxisAutoDiv: TRUE
CellAxisAutoUnits: TRUE CellAxisAutoUnits: TRUE
CellAxisDivSize: 1.00000000000000E+014 CellAxisDivSize: 1.00000000000000E+014
CellAxisOffset: -1.00100300000000E+020 CellAxisOffset: -1.00100300000000E+020
CellAxisScaleMode: 0 CellAxisScaleMode: 0
CellAxisLogScaleBase: 10 CellAxisLogScaleBase: 10
WaveName: U_PWM WaveName: U_PWM
WaveEq: v(U_PWM) WaveEq: v(U_PWM)
WaveColor: 11221163 WaveColor: 11221163
WaveYUnitStr: V WaveYUnitStr: V
CellSelectedAxis: 0 CellSelectedAxis: 0
CellXAxisDivisions: 10 CellXAxisDivisions: 10
CellXAxisLabel: Time CellXAxisLabel: Time
CellXAxisUnits: s CellXAxisUnits: s
CellXAxisAutoMin: TRUE CellXAxisAutoMin: TRUE
CellXAxisAutoMax: TRUE CellXAxisAutoMax: TRUE
CellXAxisAutoDiv: TRUE CellXAxisAutoDiv: TRUE
CellXAxisAutoLabel TRUE CellXAxisAutoLabel TRUE
CellXAxisAutoUnits: TRUE CellXAxisAutoUnits: TRUE
CellXAxisDivSize: 1.00000000000000E-003 CellXAxisDivSize: 1.00000000000000E-003
CellXAxisOffset: 0.00000000000000E+000 CellXAxisOffset: 0.00000000000000E+000
CellXAxisMin: 1.00000000000000E-002 CellXAxisMin: 1.00000000000000E-002
CellXAxisMax: 2.00000000000000E-002 CellXAxisMax: 2.00000000000000E-002
CellXAxisScaleMode: 0 CellXAxisScaleMode: 0
CellXAxisLogScaleBase: 10 CellXAxisLogScaleBase: 10
CellXAxisZoomOffset: 0.00000000000000E+000 CellXAxisZoomOffset: 0.00000000000000E+000
CellXAxisZoomRange: 1.00000000000000E-002 CellXAxisZoomRange: 1.00000000000000E-002
ChartCursorAXPos: 0 ChartCursorAXPos: 0
ChartCursorAYPos: 0 ChartCursorAYPos: 0
ChartCursorAXVal: 0.00000000000000E+000 ChartCursorAXVal: 0.00000000000000E+000
ChartCursorAYVal: 0.00000000000000E+000 ChartCursorAYVal: 0.00000000000000E+000
ChartCursorBXPos: 0 ChartCursorBXPos: 0
ChartCursorBYPos: 0 ChartCursorBYPos: 0
ChartCursorBXVal: 0.00000000000000E+000 ChartCursorBXVal: 0.00000000000000E+000
ChartCursorBYVal: 0.00000000000000E+000 ChartCursorBYVal: 0.00000000000000E+000
ChartActiveCellIndex: 3 ChartActiveCellIndex: 3
ChartTopCellIndex: 0 ChartTopCellIndex: 0
ActiveChartName: Transient Analysis ActiveChartName: Transient Analysis
FilteredWavesBlend: 80 FilteredWavesBlend: 80
#ChartSetupsEnd #ChartSetupsEnd
Chart: Transient Analysis Chart: Transient Analysis
ChartId: SXLHKXUU ChartId: SXLHKXUU
ChartShow: TRUE ChartShow: TRUE
ChartXMinReal: 1.00000000000000E-002 ChartXMinReal: 1.00000000000000E-002
ChartXMaxReal: 2.00000000000000E-002 ChartXMaxReal: 2.00000000000000E-002
Wave: time Wave: time
WaveYUnitStr: s WaveYUnitStr: s
WaveHint: WaveHint:
WavePoints: 0 WavePoints: 0
WaveIsXComplex: FALSE WaveIsXComplex: FALSE
WaveIsYComplex: FALSE WaveIsYComplex: FALSE
WaveType: 0 WaveType: 0
WaveVariableType: General WaveVariableType: General
WaveIndependent: TRUE WaveIndependent: TRUE
WaveDataStart WaveDataStart
Wave: v(u_pwm) Wave: v(u_pwm)
WaveYUnitStr: V WaveYUnitStr: V
WaveHint: WaveHint:
WavePoints: 0 WavePoints: 0
WaveIsXComplex: FALSE WaveIsXComplex: FALSE
WaveIsYComplex: FALSE WaveIsYComplex: FALSE
WaveType: 0 WaveType: 0
WaveVariableType: General WaveVariableType: General
WaveDataStart WaveDataStart
Wave: v(u_saw) Wave: v(u_saw)
WaveYUnitStr: V WaveYUnitStr: V
WaveHint: WaveHint:
WavePoints: 0 WavePoints: 0
WaveIsXComplex: FALSE WaveIsXComplex: FALSE
WaveIsYComplex: FALSE WaveIsYComplex: FALSE
WaveType: 0 WaveType: 0
WaveVariableType: General WaveVariableType: General
WaveDataStart WaveDataStart
Wave: v(u_sqr) Wave: v(u_sqr)
WaveYUnitStr: V WaveYUnitStr: V
WaveHint: WaveHint:
WavePoints: 0 WavePoints: 0
WaveIsXComplex: FALSE WaveIsXComplex: FALSE
WaveIsYComplex: FALSE WaveIsYComplex: FALSE
WaveType: 0 WaveType: 0
WaveVariableType: General WaveVariableType: General
WaveDataStart WaveDataStart
Wave: v(u_tri) Wave: v(u_tri)
WaveYUnitStr: V WaveYUnitStr: V
WaveHint: WaveHint:
WavePoints: 0 WavePoints: 0
WaveIsXComplex: FALSE WaveIsXComplex: FALSE
WaveIsYComplex: FALSE WaveIsYComplex: FALSE
WaveType: 0 WaveType: 0
WaveVariableType: General WaveVariableType: General
WaveDataStart WaveDataStart

File diff suppressed because one or more lines are too long

View File

@@ -1 +1 @@
Record=TopLevelDocument|FileName=TRI-SQR-VCO_OTA.SchDoc|SheetNumber=1 Record=TopLevelDocument|FileName=TRI-SQR-VCO_OTA.SchDoc|SheetNumber=1

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

View File

@@ -1,10 +1,10 @@
Output: Mixed Sim Output: Mixed Sim
Type : AdvSimNetlist Type : AdvSimNetlist
From : Project [TRI-SQR-VCO_OTA.PrjPcb] From : Project [TRI-SQR-VCO_OTA.PrjPcb]
Generated File[TRI-SQR-VCO_OTA.nsx] Generated File[TRI-SQR-VCO_OTA.nsx]
Files Generated : 1 Files Generated : 1
Documents Printed : 0 Documents Printed : 0
Finished Output Generation At 16:32:06 On 16.09.2025 Finished Output Generation At 16:32:06 On 16.09.2025

View File

@@ -1,232 +1,232 @@
TRI-SQR-VCO_OTA TRI-SQR-VCO_OTA
*SPICE Netlist generated by Advanced Sim server on 20.10.2025 07:52:41 *SPICE Netlist generated by Advanced Sim server on 20.10.2025 07:52:41
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
CC NetC_1 0 4.9645nF CC NetC_1 0 4.9645nF
CC_an NetC_an_1 NetC_an_2 1nF CC_an NetC_an_1 NetC_an_2 1nF
XIC1A NetIC1_16 NetIC1_15 U_SQR_OTA U_C NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1A_9 XIC1A NetIC1_16 NetIC1_15 U_SQR_OTA U_C NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1A_9
+ ExtraNet_XIC1A_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL + ExtraNet_XIC1A_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL
XIC1B NetIC1_16 NetIC1_15 U_SQR_OTA U_C NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1B_9 XIC1B NetIC1_16 NetIC1_15 U_SQR_OTA U_C NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1B_9
+ ExtraNet_XIC1B_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL + ExtraNet_XIC1B_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL
XIC1C NetIC1_16 NetIC1_15 U_SQR_OTA U_C NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1C_9 XIC1C NetIC1_16 NetIC1_15 U_SQR_OTA U_C NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1C_9
+ ExtraNet_XIC1C_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL + ExtraNet_XIC1C_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL
XIC1E NetIC1_16 NetIC1_15 U_SQR_OTA U_C NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1E_9 XIC1E NetIC1_16 NetIC1_15 U_SQR_OTA U_C NetC_1 Vee NetC_1 U_TRI ExtraNet_XIC1E_9
+ ExtraNet_XIC1E_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL + ExtraNet_XIC1E_10 Vcc U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL
XIC2A U_SQR_OTA U_SQR Vcc Vee U_SQR TL074 XIC2A U_SQR_OTA U_SQR Vcc Vee U_SQR TL074
XIC2B 0 NetC_an_1 Vcc Vee NetIC2_7 TL074 XIC2B 0 NetC_an_1 Vcc Vee NetIC2_7 TL074
XIC2C 0 NetIC2_9 Vcc Vee U_C TL074 XIC2C 0 NetIC2_9 Vcc Vee U_C TL074
XIC2D NetIC2_12 NetIC2_13 Vcc Vee U_SAW TL074 XIC2D NetIC2_12 NetIC2_13 Vcc Vee U_SAW TL074
XIC3A 0 NetIC3_2 Vcc Vee U_in TL074 XIC3A 0 NetIC3_2 Vcc Vee U_in TL074
XIC3B U_SAW NetIC3_6 Vcc Vee NetIC3_7 TL074 XIC3B U_SAW NetIC3_6 Vcc Vee NetIC3_7 TL074
RR2 Vee U_TRI 20k RR2 Vee U_TRI 20k
RR3 Vcc NetIC1_1 16.9k RR3 Vcc NetIC1_1 16.9k
RR4a NetIC3_2 U_TRI 100k RR4a NetIC3_2 U_TRI 100k
RR4b U_in NetIC3_2 56k RR4b U_in NetIC3_2 56k
RR_A 0 U_SQR_OTA 4.7k RR_A 0 U_SQR_OTA 4.7k
RR_CV NetR_CV_1 NetIC2_9 59.941k RR_CV NetR_CV_1 NetIC2_9 59.941k
RR_E NetC_an_2 NetR_E_2 20k RR_E NetC_an_2 NetR_E_2 20k
RR_goofer NetR_goofer_1 NetIC3_2 1Meg RR_goofer NetR_goofer_1 NetIC3_2 1Meg
RR_lambda_T NetIC2_9 U_C 1.1k RR_lambda_T NetIC2_9 U_C 1.1k
RR_PWM_a Vee NetIC3_6 15k RR_PWM_a Vee NetIC3_6 15k
RR_PWM_b NetIC3_6 Vcc 10k RR_PWM_b NetIC3_6 Vcc 10k
RR_PWM_c U_PWM NetIC3_7 1k RR_PWM_c U_PWM NetIC3_7 1k
RR_PWM_d 0 U_PWM 2k RR_PWM_d 0 U_PWM 2k
RR_ref NetC_an_1 Vee 524.8k RR_ref NetC_an_1 Vee 524.8k
RR_SAW_a NetIC2_13 U_in 10k RR_SAW_a NetIC2_13 U_in 10k
RR_SAW_b NetIC2_12 U_in 10k RR_SAW_b NetIC2_12 U_in 10k
RR_SAW_c U_SAW NetIC2_13 10k RR_SAW_c U_SAW NetIC2_13 10k
RR_SAW_d 0 U_SAW 1k RR_SAW_d 0 U_SAW 1k
RR_SAW_e U_SQR NetR_SAW_e_2 33k RR_SAW_e U_SQR NetR_SAW_e_2 33k
RR_trim_a NetR_goofer_1 Vee 50k RR_trim_a NetR_goofer_1 Vee 50k
RR_trim_b Vcc NetR_goofer_1 50k RR_trim_b Vcc NetR_goofer_1 50k
RRoff NetIC3_2 Vee 216.67k RRoff NetIC3_2 Vee 216.67k
QT1 NetC_an_1 0 NetC_an_2 2N2907 QT1 NetC_an_1 0 NetC_an_2 2N2907
QT2 NetT2_3 U_C NetC_an_2 2N2907 QT2 NetT2_3 U_C NetC_an_2 2N2907
JT_SAW 0 NetR_SAW_e_2 NetIC2_12 BF545B JT_SAW 0 NetR_SAW_e_2 NetIC2_12 BF545B
VU_mess NetT2_3 NetIC1_16 0 VU_mess NetT2_3 NetIC1_16 0
VU_messref NetR_E_2 NetIC2_7 0 VU_messref NetR_E_2 NetIC2_7 0
VU_neg 0 Vee +5V VU_neg 0 Vee +5V
VU_pos Vcc 0 +5V VU_pos Vcc 0 +5V
VU_var NetR_CV_1 0 1 VU_var NetR_CV_1 0 1
.PLOT TRAN {v(U_SQR)} =PLOT(1) =AXIS(1) =NAME(U_SQR) =UNITS(V) .PLOT TRAN {v(U_SQR)} =PLOT(1) =AXIS(1) =NAME(U_SQR) =UNITS(V)
.PLOT TRAN {v(U_TRI)} =PLOT(2) =AXIS(1) =NAME(U_TRI) =UNITS(V) .PLOT TRAN {v(U_TRI)} =PLOT(2) =AXIS(1) =NAME(U_TRI) =UNITS(V)
.PLOT TRAN {i(U_mess)} =PLOT(3) =AXIS(1) =NAME(I_ABC) =UNITS(A) .PLOT TRAN {i(U_mess)} =PLOT(3) =AXIS(1) =NAME(I_ABC) =UNITS(A)
.PLOT TRAN {i(R3)} =PLOT(4) =AXIS(1) =NAME(I_ABC_OTA2) =UNITS(A) .PLOT TRAN {i(R3)} =PLOT(4) =AXIS(1) =NAME(I_ABC_OTA2) =UNITS(A)
*Selected Circuit Analyses: *Selected Circuit Analyses:
.TRAN 45u 20m 5m 45u .TRAN 45u 20m 5m 45u
.CONTROL .CONTROL
SWEEP U_var LIST -1 SWEEP U_var LIST -1
.ENDC .ENDC
*Models and Subcircuits: *Models and Subcircuits:
* A dual opamp ngspice model * A dual opamp ngspice model
* file name: LM13700-DUAL.ckt * file name: LM13700-DUAL.ckt
.subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+ .subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+
+ 2out 2in- 2in+ 2Dbias 2ABin + 2out 2in- 2in+ 2Dbias 2ABin
*////////////////////////////////////////////////////////////////////// *//////////////////////////////////////////////////////////////////////
* (C) National Semiconductor, Inc. * (C) National Semiconductor, Inc.
* Models developed and under copyright by: * Models developed and under copyright by:
* National Semiconductor, Inc. * National Semiconductor, Inc.
*///////////////////////////////////////////////////////////////////// */////////////////////////////////////////////////////////////////////
* Legal Notice: This material is intended for free software support. * Legal Notice: This material is intended for free software support.
* The file may be copied, and distributed; however, reselling the * The file may be copied, and distributed; however, reselling the
* material is illegal * material is illegal
*//////////////////////////////////////////////////////////////////// *////////////////////////////////////////////////////////////////////
* For ordering or technical information on these models, contact: * For ordering or technical information on these models, contact:
* National Semiconductor's Customer Response Center * National Semiconductor's Customer Response Center
* 7:00 A.M.--7:00 P.M. U.S. Central Time * 7:00 A.M.--7:00 P.M. U.S. Central Time
* (800) 272-9959 * (800) 272-9959
* For Applications support, contact the Internet address: * For Applications support, contact the Internet address:
* amps-apps@galaxy.nsc.com * amps-apps@galaxy.nsc.com
* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ * \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
* LM13700 Dual Operational Transconductance Amplifier * LM13700 Dual Operational Transconductance Amplifier
* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ * \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
* *
* Amplifier Bias Input * Amplifier Bias Input
* | Diode Bias * | Diode Bias
* | | Positive Input * | | Positive Input
* | | | Negative Input * | | | Negative Input
* | | | | Output * | | | | Output
* | | | | | Negative power supply * | | | | | Negative power supply
* | | | | | | Buffer Input * | | | | | | Buffer Input
* | | | | | | | Buffer Output * | | | | | | | Buffer Output
* | | | | | | | | Positive power supply * | | | | | | | | Positive power supply
* | | | | | | | | | * | | | | | | | | |
.SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11 .SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11
* *
* Features: * Features:
* gm adjustable over 6 decades. * gm adjustable over 6 decades.
* Excellent gm linearity. * Excellent gm linearity.
* Linearizing diodes. * Linearizing diodes.
* Wide supply range of +/-2V to +/-22V. * Wide supply range of +/-2V to +/-22V.
* *
* Note: This model is single-pole in nature and over-estimates * Note: This model is single-pole in nature and over-estimates
* AC bandwidth and phase margin (stability) by over 2X. * AC bandwidth and phase margin (stability) by over 2X.
* Although refinement may be possible in the future, please * Although refinement may be possible in the future, please
* use benchtesting to finalize AC circuit design. * use benchtesting to finalize AC circuit design.
* *
* Note: Model is for single device only and simulated * Note: Model is for single device only and simulated
* supply current is 1/2 of total device current. * supply current is 1/2 of total device current.
* *
****************************************************** ******************************************************
* *
C1 6 4 4.8P C1 6 4 4.8P
C2 3 6 4.8P C2 3 6 4.8P
* Output capacitor * Output capacitor
C3 5 6 6.26P C3 5 6 6.26P
D1 2 4 DX D1 2 4 DX
D2 2 3 DX D2 2 3 DX
D3 11 21 DX D3 11 21 DX
D4 21 22 DX D4 21 22 DX
D5 1 26 DX D5 1 26 DX
D6 26 27 DX D6 26 27 DX
D7 5 29 DX D7 5 29 DX
D8 28 5 DX D8 28 5 DX
D10 31 25 DX D10 31 25 DX
* Clamp for -CMR * Clamp for -CMR
D11 28 25 DX D11 28 25 DX
* Ios source * Ios source
F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9 F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9
F2 11 5 V2 1.022 F2 11 5 V2 1.022
F3 25 6 V3 1.0 F3 25 6 V3 1.0
F4 5 6 V1 1.022 F4 5 6 V1 1.022
* Output impedance * Output impedance
F5 5 0 POLY(2) V3 V7 0 0 0 0 1 F5 5 0 POLY(2) V3 V7 0 0 0 0 1
G1 0 33 5 0 .55E-3 G1 0 33 5 0 .55E-3
I1 11 6 300U I1 11 6 300U
Q1 24 32 31 QX1 Q1 24 32 31 QX1
Q2 23 3 31 QX2 Q2 23 3 31 QX2
Q3 11 7 30 QZ Q3 11 7 30 QZ
Q4 11 30 8 QY Q4 11 30 8 QY
V1 22 24 0V V1 22 24 0V
V2 22 23 0V V2 22 23 0V
V3 27 6 0V V3 27 6 0V
V4 11 29 1.4 V4 11 29 1.4
V5 28 6 1.2 V5 28 6 1.2
V6 4 32 0V V6 4 32 0V
V7 33 0 0V V7 33 0 0V
.MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2) .MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2) .MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QY NPN (IS=6E-15 BF=50) .MODEL QY NPN (IS=6E-15 BF=50)
.MODEL QZ NPN (IS=5E-16 BF=266) .MODEL QZ NPN (IS=5E-16 BF=266)
.MODEL DX D (IS=5E-16) .MODEL DX D (IS=5E-16)
.ENDS .ENDS
*$ *$
XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS
XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS
.ends .ends
*TL074 *TL074
*Quad LoNoise JFETInput OpAmp pkg:DIP14 *Quad LoNoise JFETInput OpAmp pkg:DIP14
*+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14) *+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14)
* Connections: * Connections:
* Non-Inverting Input * Non-Inverting Input
* | Inverting Input * | Inverting Input
* | | Positive Power Supply * | | Positive Power Supply
* | | | Negative Power Supply * | | | Negative Power Supply
* | | | | Output * | | | | Output
* | | | | | * | | | | |
.SUBCKT TL074 1 2 3 4 5 .SUBCKT TL074 1 2 3 4 5
C1 11 12 3.498E-12 C1 11 12 3.498E-12
C2 6 7 15E-12 C2 6 7 15E-12
DC 5 53 DX DC 5 53 DX
DE 54 5 DX DE 54 5 DX
DLP 90 91 DX DLP 90 91 DX
DLN 92 90 DX DLN 92 90 DX
DP 4 3 DX DP 4 3 DX
BGND 99 0 V=V(3)*.5 + V(4)*.5 BGND 99 0 V=V(3)*.5 + V(4)*.5
BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 + BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
+ I(VLP)*5E6 - I(VLN)*5E6 + I(VLP)*5E6 - I(VLN)*5E6
GA 6 0 11 12 282.8E-6 GA 6 0 11 12 282.8E-6
GCM 0 6 10 99 8.942E-9 GCM 0 6 10 99 8.942E-9
ISS 3 10 DC 195E-6 ISS 3 10 DC 195E-6
HLIM 90 0 VLIM 1K HLIM 90 0 VLIM 1K
J1 11 2 10 JX J1 11 2 10 JX
J2 12 1 10 JX J2 12 1 10 JX
R2 6 9 100E3 R2 6 9 100E3
RD1 4 11 3.536E3 RD1 4 11 3.536E3
RD2 4 12 3.536E3 RD2 4 12 3.536E3
RO1 8 5 150 RO1 8 5 150
RO2 7 99 150 RO2 7 99 150
RP 3 4 2.143E3 RP 3 4 2.143E3
RSS 10 99 1.026E6 RSS 10 99 1.026E6
VB 9 0 DC 0 VB 9 0 DC 0
VC 3 53 DC 2.2 VC 3 53 DC 2.2
VE 54 4 DC 2.2 VE 54 4 DC 2.2
VLIM 7 8 DC 0 VLIM 7 8 DC 0
VLP 91 0 DC 25 VLP 91 0 DC 25
VLN 0 92 DC 25 VLN 0 92 DC 25
.MODEL DX D(IS=800E-18) .MODEL DX D(IS=800E-18)
.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1) .MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
.ENDS TL074 .ENDS TL074
*2N2907 MCE 5-27-97 *2N2907 MCE 5-27-97
*Ref: Motorola Small-Signal Device databook, Q4/94 *Ref: Motorola Small-Signal Device databook, Q4/94
*Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1 *Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1
.MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2 .MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2
+ BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5 + BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5
+ CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N) + CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N)
*PHILIPS SEMICONDUCTORS Version: 1.0 *PHILIPS SEMICONDUCTORS Version: 1.0
*Filename: BF545B.PRM Date: Oct 1992 *Filename: BF545B.PRM Date: Oct 1992
* *
.MODEL BF545B NJF .MODEL BF545B NJF
+( +(
+ VTO = -2.3085E+000 + VTO = -2.3085E+000
+ BETA = 1.09045E-003 + BETA = 1.09045E-003
+ LAMBDA = 2.31754E-002 + LAMBDA = 2.31754E-002
+ RD = 7.77648E+000 + RD = 7.77648E+000
+ RS = 7.77648E+000 + RS = 7.77648E+000
+ IS = 2.59121E-016 + IS = 2.59121E-016
+ CGS = 2.00000E-012 + CGS = 2.00000E-012
+ CGD = 2.20000E-012 + CGD = 2.20000E-012
+ PB = 9.91494E-001 + PB = 9.91494E-001
+ FC = 5.00000E-001 + FC = 5.00000E-001
+) +)
.END .END

View File

@@ -1,10 +1,10 @@
Output: Mixed Sim Output: Mixed Sim
Type : AdvSimNetlist Type : AdvSimNetlist
From : Project [TRI-SQR-VCO_OTA_SS.PrjPcb] From : Project [TRI-SQR-VCO_OTA_SS.PrjPcb]
Generated File[TRI-SQR-VCO_OTA_SS.nsx] Generated File[TRI-SQR-VCO_OTA_SS.nsx]
Files Generated : 1 Files Generated : 1
Documents Printed : 0 Documents Printed : 0
Finished Output Generation At 14:45:26 On 03.02.2026 Finished Output Generation At 14:45:26 On 03.02.2026

View File

@@ -1,266 +1,266 @@
TRI-SQR-VCO_OTA_SS TRI-SQR-VCO_OTA_SS
*SPICE Netlist generated by Advanced Sim server on 03.02.2026 15:26:41 *SPICE Netlist generated by Advanced Sim server on 03.02.2026 15:26:41
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
CC NetC_1 VCM 4.7nF CC NetC_1 VCM 4.7nF
CC_an NetC_an_1 NetC_an_2 1nF CC_an NetC_an_1 NetC_an_2 1nF
XIC1A NetIC1_16 NetIC1_15 U_SQR_OTA VCM NetC_1 0 NetC_1 U_TRI ExtraNet_XIC1A_9 XIC1A NetIC1_16 NetIC1_15 U_SQR_OTA VCM NetC_1 0 NetC_1 U_TRI ExtraNet_XIC1A_9
+ ExtraNet_XIC1A_10 VAP U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL + ExtraNet_XIC1A_10 VAP U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL
XIC1B NetIC1_16 NetIC1_15 U_SQR_OTA VCM NetC_1 0 NetC_1 U_TRI ExtraNet_XIC1B_9 XIC1B NetIC1_16 NetIC1_15 U_SQR_OTA VCM NetC_1 0 NetC_1 U_TRI ExtraNet_XIC1B_9
+ ExtraNet_XIC1B_10 VAP U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL + ExtraNet_XIC1B_10 VAP U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL
XIC1C NetIC1_16 NetIC1_15 U_SQR_OTA VCM NetC_1 0 NetC_1 U_TRI ExtraNet_XIC1C_9 XIC1C NetIC1_16 NetIC1_15 U_SQR_OTA VCM NetC_1 0 NetC_1 U_TRI ExtraNet_XIC1C_9
+ ExtraNet_XIC1C_10 VAP U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL + ExtraNet_XIC1C_10 VAP U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL
XIC1E NetIC1_16 NetIC1_15 U_SQR_OTA VCM NetC_1 0 NetC_1 U_TRI ExtraNet_XIC1E_9 XIC1E NetIC1_16 NetIC1_15 U_SQR_OTA VCM NetC_1 0 NetC_1 U_TRI ExtraNet_XIC1E_9
+ ExtraNet_XIC1E_10 VAP U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL + ExtraNet_XIC1E_10 VAP U_SQR_OTA U_TRI U_SQR_OTA NetIC1_2 NetIC1_1 LM13700-DUAL
XIC2A U_SQR_OTA U_SQR VAP 0 U_SQR TL074 XIC2A U_SQR_OTA U_SQR VAP 0 U_SQR TL074
XIC2B VCM NetC_an_1 VAP 0 NetIC2_7 TL074 XIC2B VCM NetC_an_1 VAP 0 NetIC2_7 TL074
XIC2C VCM NetIC2_9 VAP 0 NetIC2_8 TL074 XIC2C VCM NetIC2_9 VAP 0 NetIC2_8 TL074
XIC2D NetIC2_12 NetIC2_13 VAP 0 U_SAW TL074 XIC2D NetIC2_12 NetIC2_13 VAP 0 U_SAW TL074
XIC3A VCM NetIC3_2 VAP 0 U_in TL074 XIC3A VCM NetIC3_2 VAP 0 U_in TL074
XIC3B U_SAW NetIC3_6 VAP 0 NetIC3_7 TL074 XIC3B U_SAW NetIC3_6 VAP 0 NetIC3_7 TL074
XIC3C VCM NetIC3_9 VAP 0 U_C TL074 XIC3C VCM NetIC3_9 VAP 0 U_C TL074
XIC3D VCM NetIC3_13 VAP 0 U_CV TL074 XIC3D VCM NetIC3_13 VAP 0 U_CV TL074
XIC4A R.VMID NetIC4_1 VAP 0 NetIC4_1 TL074 XIC4A R.VMID NetIC4_1 VAP 0 NetIC4_1 TL074
RR2 0 U_TRI 20k RR2 0 U_TRI 20k
RR3 VAP NetIC1_1 15k RR3 VAP NetIC1_1 15k
RR4a NetIC3_2 U_TRI 200k RR4a NetIC3_2 U_TRI 200k
RR4b U_in NetIC3_2 100k RR4b U_in NetIC3_2 100k
RR_Aa NetR_Aa_1 U_SQR_OTA 3.3k RR_Aa NetR_Aa_1 U_SQR_OTA 3.3k
RR_Ab VCM NetR_Aa_1 330R RR_Ab VCM NetR_Aa_1 330R
RR_COARSEA 0 NetR_COARSE_2 {100k * {COARSE}} RR_COARSEA 0 NetR_COARSE_2 {100k * {COARSE}}
RR_COARSEB NetR_COARSE_2 VAP {100k - (100k * {COARSE})} RR_COARSEB NetR_COARSE_2 VAP {100k - (100k * {COARSE})}
RR_CV_a NetIC3_9 U_C 1k RR_CV_a NetIC3_9 U_C 1k
RR_CV_b NetR_COARSE_2 NetIC3_9 47k RR_CV_b NetR_COARSE_2 NetIC3_9 47k
RR_CV_c U_CV NetIC3_9 47k RR_CV_c U_CV NetIC3_9 47k
RR_CV_d NetIC3_9 NetR_CV_d_2 1Meg RR_CV_d NetIC3_9 NetR_CV_d_2 1Meg
RR_E NetC_an_2 NetR_E_2 10k RR_E NetC_an_2 NetR_E_2 10k
RR_FINEA 0 NetR_CV_d_2 {100k * {FINE}} RR_FINEA 0 NetR_CV_d_2 {100k * {FINE}}
RR_FINEB NetR_CV_d_2 VAP {100k - (100k * {FINE})} RR_FINEB NetR_CV_d_2 VAP {100k - (100k * {FINE})}
RR_inv_a NetIC2_8 NetIC3_13 10k RR_inv_a NetIC2_8 NetIC3_13 10k
RR_inv_b NetIC3_13 U_CV 10k RR_inv_b NetIC3_13 U_CV 10k
RR_off_b NetIC2_9 NetIC2_8 10k RR_off_b NetIC2_9 NetIC2_8 10k
RR_off_c_sim VAP NetIC2_9 10k RR_off_c_sim VAP NetIC2_9 10k
RR_off_d NetR_off_d_1 NetIC2_9 10k RR_off_d NetR_off_d_1 NetIC2_9 10k
RR_POT_refA 0 NetR_POT_ref_2 {100k * 0.5} RR_POT_refA 0 NetR_POT_ref_2 {100k * 0.5}
RR_POT_refB NetR_POT_ref_2 NetR_POT_ref_2 {100k - (100k * 0.5)} RR_POT_refB NetR_POT_ref_2 NetR_POT_ref_2 {100k - (100k * 0.5)}
RR_POT_SAWA 0 0 {10k * 0.5} RR_POT_SAWA 0 0 {10k * 0.5}
RR_POT_SAWB 0 NetR_POT_SAW_3 {10k - (10k * 0.5)} RR_POT_SAWB 0 NetR_POT_SAW_3 {10k - (10k * 0.5)}
RR_PWM_a1 NetR_POT_SAW_3 NetIC3_6 10k RR_PWM_a1 NetR_POT_SAW_3 NetIC3_6 10k
RR_PWM_a2 NetR_POT_SAW_3 NetIC3_6 10k RR_PWM_a2 NetR_POT_SAW_3 NetIC3_6 10k
RR_PWM_b NetIC3_6 VAP 10k RR_PWM_b NetIC3_6 VAP 10k
RR_PWM_c U_PWM NetIC3_7 10k RR_PWM_c U_PWM NetIC3_7 10k
RR_PWM_d VCM U_PWM 20k RR_PWM_d VCM U_PWM 20k
RR_ref NetC_an_1 NetR_POT_ref_2 470k RR_ref NetC_an_1 NetR_POT_ref_2 470k
RR_S1 R.VMID VAP 510k RR_S1 R.VMID VAP 510k
RR_S2 0 R.VMID 510k RR_S2 0 R.VMID 510k
RR_SAW_a NetIC2_13 U_in 10k RR_SAW_a NetIC2_13 U_in 10k
RR_SAW_b NetIC2_12 U_in 10k RR_SAW_b NetIC2_12 U_in 10k
RR_SAW_c U_SAW NetIC2_13 10k RR_SAW_c U_SAW NetIC2_13 10k
RR_SAW_e U_SQR fet_gate 33k RR_SAW_e U_SQR fet_gate 33k
RR_SAW_f 0 fet_gate 100k RR_SAW_f 0 fet_gate 100k
RRoff_a NetIC3_2 0 1Meg RRoff_a NetIC3_2 0 1Meg
RRoff_b NetIC3_2 0 1Meg RRoff_b NetIC3_2 0 1Meg
XT1 VCM NetC_an_2 NetC_an_1 U_C NetC_an_2 NetT1_6 DMMT3906W XT1 VCM NetC_an_2 NetC_an_1 U_C NetC_an_2 NetT1_6 DMMT3906W
JT_SAW VCM fet_gate NetIC2_12 BF256B JT_SAW VCM fet_gate NetIC2_12 BF256B
VU_mess NetT1_6 NetIC1_16 0 VU_mess NetT1_6 NetIC1_16 0
VU_MESSITOGND NetIC4_1 VCM 0 VU_MESSITOGND NetIC4_1 VCM 0
VU_messref NetR_E_2 NetIC2_7 0 VU_messref NetR_E_2 NetIC2_7 0
VU_single VAP 0 +10V VU_single VAP 0 +10V
VU_var NetR_off_d_1 0 1 VU_var NetR_off_d_1 0 1
.PLOT TRAN {v(U_SQR)} =PLOT(1) =AXIS(1) =NAME(U_SQR) =UNITS(V) .PLOT TRAN {v(U_SQR)} =PLOT(1) =AXIS(1) =NAME(U_SQR) =UNITS(V)
.PLOT TRAN {v(U_TRI)} =PLOT(2) =AXIS(1) =NAME(U_TRI) =UNITS(V) .PLOT TRAN {v(U_TRI)} =PLOT(2) =AXIS(1) =NAME(U_TRI) =UNITS(V)
.PLOT TRAN {v(U_SAW)} =PLOT(3) =AXIS(1) =NAME(U_SAW) =UNITS(V) .PLOT TRAN {v(U_SAW)} =PLOT(3) =AXIS(1) =NAME(U_SAW) =UNITS(V)
.PLOT TRAN {v(U_PWM)} =PLOT(4) =AXIS(1) =NAME(U_PWM) =UNITS(V) .PLOT TRAN {v(U_PWM)} =PLOT(4) =AXIS(1) =NAME(U_PWM) =UNITS(V)
.PLOT TRAN {i(U_MESSITOGND)} =PLOT(5) =AXIS(1) =NAME(I_GND) =UNITS(A) .PLOT TRAN {i(U_MESSITOGND)} =PLOT(5) =AXIS(1) =NAME(I_GND) =UNITS(A)
.PLOT TRAN {p(U_single)} =PLOT(6) =AXIS(1) =NAME(P_Supply) =UNITS(W) .PLOT TRAN {p(U_single)} =PLOT(6) =AXIS(1) =NAME(P_Supply) =UNITS(W)
.PLOT TRAN {i(U_mess)} =PLOT(7) =AXIS(1) =NAME(I_ABC) =UNITS(A) .PLOT TRAN {i(U_mess)} =PLOT(7) =AXIS(1) =NAME(I_ABC) =UNITS(A)
.PLOT TRAN {v(U_C)} =PLOT(8) =AXIS(1) =NAME(U_C) =UNITS(V) .PLOT TRAN {v(U_C)} =PLOT(8) =AXIS(1) =NAME(U_C) =UNITS(V)
.PLOT TRAN {v(U_CV)} =PLOT(9) =AXIS(1) .PLOT TRAN {v(U_CV)} =PLOT(9) =AXIS(1)
.OPTIONS ABSTOL=1e-10 RELTOL=1e-2 VNTOL=1e-4 METHOD=GEAR MAXORD=2 .OPTIONS ABSTOL=1e-10 RELTOL=1e-2 VNTOL=1e-4 METHOD=GEAR MAXORD=2
*Selected Circuit Analyses: *Selected Circuit Analyses:
.TRAN 25u 20m 5m 25u .TRAN 25u 20m 5m 25u
.CONTROL .CONTROL
SWEEP U_var LIST 0 1 2 SWEEP U_var LIST 0 1 2
.ENDC .ENDC
*Global Parameters: *Global Parameters:
.PARAM COARSE={0.50} .PARAM COARSE={0.50}
.PARAM FINE={0.3} .PARAM FINE={0.3}
*Models and Subcircuits: *Models and Subcircuits:
* A dual opamp ngspice model * A dual opamp ngspice model
* file name: LM13700-DUAL.ckt * file name: LM13700-DUAL.ckt
.subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+ .subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+
+ 2out 2in- 2in+ 2Dbias 2ABin + 2out 2in- 2in+ 2Dbias 2ABin
*////////////////////////////////////////////////////////////////////// *//////////////////////////////////////////////////////////////////////
* (C) National Semiconductor, Inc. * (C) National Semiconductor, Inc.
* Models developed and under copyright by: * Models developed and under copyright by:
* National Semiconductor, Inc. * National Semiconductor, Inc.
*///////////////////////////////////////////////////////////////////// */////////////////////////////////////////////////////////////////////
* Legal Notice: This material is intended for free software support. * Legal Notice: This material is intended for free software support.
* The file may be copied, and distributed; however, reselling the * The file may be copied, and distributed; however, reselling the
* material is illegal * material is illegal
*//////////////////////////////////////////////////////////////////// *////////////////////////////////////////////////////////////////////
* For ordering or technical information on these models, contact: * For ordering or technical information on these models, contact:
* National Semiconductor's Customer Response Center * National Semiconductor's Customer Response Center
* 7:00 A.M.--7:00 P.M. U.S. Central Time * 7:00 A.M.--7:00 P.M. U.S. Central Time
* (800) 272-9959 * (800) 272-9959
* For Applications support, contact the Internet address: * For Applications support, contact the Internet address:
* amps-apps@galaxy.nsc.com * amps-apps@galaxy.nsc.com
* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ * \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
* LM13700 Dual Operational Transconductance Amplifier * LM13700 Dual Operational Transconductance Amplifier
* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ * \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
* *
* Amplifier Bias Input * Amplifier Bias Input
* | Diode Bias * | Diode Bias
* | | Positive Input * | | Positive Input
* | | | Negative Input * | | | Negative Input
* | | | | Output * | | | | Output
* | | | | | Negative power supply * | | | | | Negative power supply
* | | | | | | Buffer Input * | | | | | | Buffer Input
* | | | | | | | Buffer Output * | | | | | | | Buffer Output
* | | | | | | | | Positive power supply * | | | | | | | | Positive power supply
* | | | | | | | | | * | | | | | | | | |
.SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11 .SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11
* *
* Features: * Features:
* gm adjustable over 6 decades. * gm adjustable over 6 decades.
* Excellent gm linearity. * Excellent gm linearity.
* Linearizing diodes. * Linearizing diodes.
* Wide supply range of +/-2V to +/-22V. * Wide supply range of +/-2V to +/-22V.
* *
* Note: This model is single-pole in nature and over-estimates * Note: This model is single-pole in nature and over-estimates
* AC bandwidth and phase margin (stability) by over 2X. * AC bandwidth and phase margin (stability) by over 2X.
* Although refinement may be possible in the future, please * Although refinement may be possible in the future, please
* use benchtesting to finalize AC circuit design. * use benchtesting to finalize AC circuit design.
* *
* Note: Model is for single device only and simulated * Note: Model is for single device only and simulated
* supply current is 1/2 of total device current. * supply current is 1/2 of total device current.
* *
****************************************************** ******************************************************
* *
C1 6 4 4.8P C1 6 4 4.8P
C2 3 6 4.8P C2 3 6 4.8P
* Output capacitor * Output capacitor
C3 5 6 6.26P C3 5 6 6.26P
D1 2 4 DX D1 2 4 DX
D2 2 3 DX D2 2 3 DX
D3 11 21 DX D3 11 21 DX
D4 21 22 DX D4 21 22 DX
D5 1 26 DX D5 1 26 DX
D6 26 27 DX D6 26 27 DX
D7 5 29 DX D7 5 29 DX
D8 28 5 DX D8 28 5 DX
D10 31 25 DX D10 31 25 DX
* Clamp for -CMR * Clamp for -CMR
D11 28 25 DX D11 28 25 DX
* Ios source * Ios source
F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9 F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9
F2 11 5 V2 1.022 F2 11 5 V2 1.022
F3 25 6 V3 1.0 F3 25 6 V3 1.0
F4 5 6 V1 1.022 F4 5 6 V1 1.022
* Output impedance * Output impedance
F5 5 0 POLY(2) V3 V7 0 0 0 0 1 F5 5 0 POLY(2) V3 V7 0 0 0 0 1
G1 0 33 5 0 .55E-3 G1 0 33 5 0 .55E-3
I1 11 6 300U I1 11 6 300U
Q1 24 32 31 QX1 Q1 24 32 31 QX1
Q2 23 3 31 QX2 Q2 23 3 31 QX2
Q3 11 7 30 QZ Q3 11 7 30 QZ
Q4 11 30 8 QY Q4 11 30 8 QY
V1 22 24 0V V1 22 24 0V
V2 22 23 0V V2 22 23 0V
V3 27 6 0V V3 27 6 0V
V4 11 29 1.4 V4 11 29 1.4
V5 28 6 1.2 V5 28 6 1.2
V6 4 32 0V V6 4 32 0V
V7 33 0 0V V7 33 0 0V
.MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2) .MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2) .MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QY NPN (IS=6E-15 BF=50) .MODEL QY NPN (IS=6E-15 BF=50)
.MODEL QZ NPN (IS=5E-16 BF=266) .MODEL QZ NPN (IS=5E-16 BF=266)
.MODEL DX D (IS=5E-16) .MODEL DX D (IS=5E-16)
.ENDS .ENDS
*$ *$
XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS
XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS
.ends .ends
*TL074 *TL074
*Quad LoNoise JFETInput OpAmp pkg:DIP14 *Quad LoNoise JFETInput OpAmp pkg:DIP14
*+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14) *+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14)
* Connections: * Connections:
* Non-Inverting Input * Non-Inverting Input
* | Inverting Input * | Inverting Input
* | | Positive Power Supply * | | Positive Power Supply
* | | | Negative Power Supply * | | | Negative Power Supply
* | | | | Output * | | | | Output
* | | | | | * | | | | |
.SUBCKT TL074 1 2 3 4 5 .SUBCKT TL074 1 2 3 4 5
C1 11 12 3.498E-12 C1 11 12 3.498E-12
C2 6 7 15E-12 C2 6 7 15E-12
DC 5 53 DX DC 5 53 DX
DE 54 5 DX DE 54 5 DX
DLP 90 91 DX DLP 90 91 DX
DLN 92 90 DX DLN 92 90 DX
DP 4 3 DX DP 4 3 DX
BGND 99 0 V=V(3)*.5 + V(4)*.5 BGND 99 0 V=V(3)*.5 + V(4)*.5
BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 + BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
+ I(VLP)*5E6 - I(VLN)*5E6 + I(VLP)*5E6 - I(VLN)*5E6
GA 6 0 11 12 282.8E-6 GA 6 0 11 12 282.8E-6
GCM 0 6 10 99 8.942E-9 GCM 0 6 10 99 8.942E-9
ISS 3 10 DC 195E-6 ISS 3 10 DC 195E-6
HLIM 90 0 VLIM 1K HLIM 90 0 VLIM 1K
J1 11 2 10 JX J1 11 2 10 JX
J2 12 1 10 JX J2 12 1 10 JX
R2 6 9 100E3 R2 6 9 100E3
RD1 4 11 3.536E3 RD1 4 11 3.536E3
RD2 4 12 3.536E3 RD2 4 12 3.536E3
RO1 8 5 150 RO1 8 5 150
RO2 7 99 150 RO2 7 99 150
RP 3 4 2.143E3 RP 3 4 2.143E3
RSS 10 99 1.026E6 RSS 10 99 1.026E6
VB 9 0 DC 0 VB 9 0 DC 0
VC 3 53 DC 2.2 VC 3 53 DC 2.2
VE 54 4 DC 2.2 VE 54 4 DC 2.2
VLIM 7 8 DC 0 VLIM 7 8 DC 0
VLP 91 0 DC 25 VLP 91 0 DC 25
VLN 0 92 DC 25 VLN 0 92 DC 25
.MODEL DX D(IS=800E-18) .MODEL DX D(IS=800E-18)
.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1) .MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
.ENDS TL074 .ENDS TL074
*SRC=DMMT3906W;DI_DMMT3906W;BJTs PNP; Si; 40.0V 0.200A 257MHz Diodes, Inc. PNP *SRC=DMMT3906W;DI_DMMT3906W;BJTs PNP; Si; 40.0V 0.200A 257MHz Diodes, Inc. PNP
.MODEL DI_DMMT3906W PNP (IS=20.3f NF=1.00 BF=274 VAF=114 .MODEL DI_DMMT3906W PNP (IS=20.3f NF=1.00 BF=274 VAF=114
+ IKF=36.4m ISE=6.99p NE=2.00 BR=4.00 NR=1.00 + IKF=36.4m ISE=6.99p NE=2.00 BR=4.00 NR=1.00
+ VAR=20.0 IKR=90.0m RE=1.01 RB=4.03 RC=0.403 + VAR=20.0 IKR=90.0m RE=1.01 RB=4.03 RC=0.403
+ XTB=1.5 CJE=12.1p VJE=1.10 MJE=0.500 CJC=10.7p VJC=0.300 + XTB=1.5 CJE=12.1p VJE=1.10 MJE=0.500 CJC=10.7p VJC=0.300
+ MJC=0.300 TF=531p TR=85.6n EG=1.12 ) + MJC=0.300 TF=531p TR=85.6n EG=1.12 )
.SUBCKT DMMT3906W B1 E1 C1 B2 E2 C2 .SUBCKT DMMT3906W B1 E1 C1 B2 E2 C2
Q1 C1 B1 E1 DI_DMMT3906W Q1 C1 B1 E1 DI_DMMT3906W
Q2 C2 B2 E2 DI_DMMT3906W Q2 C2 B2 E2 DI_DMMT3906W
.ENDS DMMT3906W .ENDS DMMT3906W
*PHILIPS SEMICONDUCTORS Version: 1.0 *PHILIPS SEMICONDUCTORS Version: 1.0
*Filename: bf256a_bf256b_philips *Filename: bf256a_bf256b_philips
* *
.MODEL BF256B NJF .MODEL BF256B NJF
+( +(
+ VTO = -2.3085E+000 + VTO = -2.3085E+000
+ BETA = 1.09045E-003 + BETA = 1.09045E-003
+ LAMBDA = 2.31754E-002 + LAMBDA = 2.31754E-002
+ RD = 7.77648E+000 + RD = 7.77648E+000
+ RS = 7.77648E+000 + RS = 7.77648E+000
+ IS = 2.59121E-016 + IS = 2.59121E-016
+ CGS = 2.00000E-012 + CGS = 2.00000E-012
+ CGD = 2.20000E-012 + CGD = 2.20000E-012
+ PB = 9.91494E-001 + PB = 9.91494E-001
+ FC = 5.00000E-001 + FC = 5.00000E-001
+) +)
.END .END

File diff suppressed because one or more lines are too long

View File

@@ -1 +1 @@
Record=TopLevelDocument|FileName=TRI-SQR-VCO_OTA_SS.SchDoc|SheetNumber=1 Record=TopLevelDocument|FileName=TRI-SQR-VCO_OTA_SS.SchDoc|SheetNumber=1

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

View File

@@ -1,10 +1,10 @@
Output: Mixed Sim Output: Mixed Sim
Type : AdvSimNetlist Type : AdvSimNetlist
From : Project [VOICE-MIXER.PrjPcb] From : Project [VOICE-MIXER.PrjPcb]
Generated File[VOICE-MIXER.nsx] Generated File[VOICE-MIXER.nsx]
Files Generated : 1 Files Generated : 1
Documents Printed : 0 Documents Printed : 0
Finished Output Generation At 17:19:12 On 13.12.2025 Finished Output Generation At 17:19:12 On 13.12.2025

View File

@@ -1,68 +1,68 @@
VOICE-MIXER VOICE-MIXER
*SPICE Netlist generated by Advanced Sim server on 14.12.2025 16:19:21 *SPICE Netlist generated by Advanced Sim server on 14.12.2025 16:19:21
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
XIC1A VCM NetIC1_2 VAP 0 U_out TL074 XIC1A VCM NetIC1_2 VAP 0 U_out TL074
RR1 U_1 NetIC1_2 330k RR1 U_1 NetIC1_2 330k
RR2 U_2 NetIC1_2 330k RR2 U_2 NetIC1_2 330k
RR3 VAP NetIC1_2 620k RR3 VAP NetIC1_2 620k
RR_K NetIC1_2 U_out 150k RR_K NetIC1_2 U_out 150k
VU_neg VCM 0 5 VU_neg VCM 0 5
VU_pos VAP VCM 5 VU_pos VAP VCM 5
VU_sin1 U_1 VCM DC 0 SIN(-1.3 2 440 0 0 0) AC 1 0 VU_sin1 U_1 VCM DC 0 SIN(-1.3 2 440 0 0 0) AC 1 0
VU_sin2 U_2 VCM DC 0 SIN(-1.3 2 440 0 0 0) AC 1 0 VU_sin2 U_2 VCM DC 0 SIN(-1.3 2 440 0 0 0) AC 1 0
.PLOT TRAN {v(U_out)} =PLOT(1) =AXIS(1) =NAME(U_out) =UNITS(V) .PLOT TRAN {v(U_out)} =PLOT(1) =AXIS(1) =NAME(U_out) =UNITS(V)
.PLOT TRAN {v(U_1)} =PLOT(1) =AXIS(1) =NAME(U_1) =UNITS(V) .PLOT TRAN {v(U_1)} =PLOT(1) =AXIS(1) =NAME(U_1) =UNITS(V)
.PLOT TRAN {v(U_2)} =PLOT(1) =AXIS(1) =NAME(U_2) =UNITS(V) .PLOT TRAN {v(U_2)} =PLOT(1) =AXIS(1) =NAME(U_2) =UNITS(V)
*Selected Circuit Analyses: *Selected Circuit Analyses:
.TRAN 10u 5m 0 10u .TRAN 10u 5m 0 10u
*Models and Subcircuits: *Models and Subcircuits:
*TL074 *TL074
*Quad LoNoise JFETInput OpAmp pkg:DIP14 *Quad LoNoise JFETInput OpAmp pkg:DIP14
*+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14) *+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14)
* Connections: * Connections:
* Non-Inverting Input * Non-Inverting Input
* | Inverting Input * | Inverting Input
* | | Positive Power Supply * | | Positive Power Supply
* | | | Negative Power Supply * | | | Negative Power Supply
* | | | | Output * | | | | Output
* | | | | | * | | | | |
.SUBCKT TL074 1 2 3 4 5 .SUBCKT TL074 1 2 3 4 5
C1 11 12 3.498E-12 C1 11 12 3.498E-12
C2 6 7 15E-12 C2 6 7 15E-12
DC 5 53 DX DC 5 53 DX
DE 54 5 DX DE 54 5 DX
DLP 90 91 DX DLP 90 91 DX
DLN 92 90 DX DLN 92 90 DX
DP 4 3 DX DP 4 3 DX
BGND 99 0 V=V(3)*.5 + V(4)*.5 BGND 99 0 V=V(3)*.5 + V(4)*.5
BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 + BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
+ I(VLP)*5E6 - I(VLN)*5E6 + I(VLP)*5E6 - I(VLN)*5E6
GA 6 0 11 12 282.8E-6 GA 6 0 11 12 282.8E-6
GCM 0 6 10 99 8.942E-9 GCM 0 6 10 99 8.942E-9
ISS 3 10 DC 195E-6 ISS 3 10 DC 195E-6
HLIM 90 0 VLIM 1K HLIM 90 0 VLIM 1K
J1 11 2 10 JX J1 11 2 10 JX
J2 12 1 10 JX J2 12 1 10 JX
R2 6 9 100E3 R2 6 9 100E3
RD1 4 11 3.536E3 RD1 4 11 3.536E3
RD2 4 12 3.536E3 RD2 4 12 3.536E3
RO1 8 5 150 RO1 8 5 150
RO2 7 99 150 RO2 7 99 150
RP 3 4 2.143E3 RP 3 4 2.143E3
RSS 10 99 1.026E6 RSS 10 99 1.026E6
VB 9 0 DC 0 VB 9 0 DC 0
VC 3 53 DC 2.2 VC 3 53 DC 2.2
VE 54 4 DC 2.2 VE 54 4 DC 2.2
VLIM 7 8 DC 0 VLIM 7 8 DC 0
VLP 91 0 DC 25 VLP 91 0 DC 25
VLN 0 92 DC 25 VLN 0 92 DC 25
.MODEL DX D(IS=800E-18) .MODEL DX D(IS=800E-18)
.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1) .MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
.ENDS TL074 .ENDS TL074
.END .END

File diff suppressed because one or more lines are too long

View File

@@ -1 +1 @@
Record=TopLevelDocument|FileName=VOICE-MIXER.SchDoc|SheetNumber=1 Record=TopLevelDocument|FileName=VOICE-MIXER.SchDoc|SheetNumber=1

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

View File

@@ -1 +1 @@
Record=TopLevelDocument|FileName=Filter_Test.SchDoc|SheetNumber=1 Record=TopLevelDocument|FileName=Filter_Test.SchDoc|SheetNumber=1

View File

@@ -1,6 +1,6 @@
Change Component Designator: Old Designator=C? New Designator=C1 Change Component Designator: Old Designator=C? New Designator=C1
Change Component Designator: Old Designator=R? New Designator=R1 Change Component Designator: Old Designator=R? New Designator=R1
Change Component Designator: Old Designator=R? New Designator=R2 Change Component Designator: Old Designator=R? New Designator=R2
Change Component Designator: Old Designator=R? New Designator=R3 Change Component Designator: Old Designator=R? New Designator=R3
Change Component Designator: Old Designator=R? New Designator=R4 Change Component Designator: Old Designator=R? New Designator=R4
Change Component Designator: Old Designator=R? New Designator=R5 Change Component Designator: Old Designator=R? New Designator=R5

View File

@@ -1,7 +1,7 @@
Change Component Designator: Old Designator=C? New Designator=C3 Change Component Designator: Old Designator=C? New Designator=C3
Change Component Designator: Old Designator=R? New Designator=R10 Change Component Designator: Old Designator=R? New Designator=R10
Change Component Designator: Old Designator=R? New Designator=R11 Change Component Designator: Old Designator=R? New Designator=R11
Change Component Designator: Old Designator=R? New Designator=R12 Change Component Designator: Old Designator=R? New Designator=R12
Change Component Designator: Old Designator=R? New Designator=R13 Change Component Designator: Old Designator=R? New Designator=R13
Change Component Designator: Old Designator=R? New Designator=R14 Change Component Designator: Old Designator=R? New Designator=R14
Change Component Designator: Old Designator=R? New Designator=R15 Change Component Designator: Old Designator=R? New Designator=R15

View File

@@ -1,216 +1,216 @@
Filter_Test Filter_Test
*SPICE Netlist generated by Advanced Sim server on 06.02.2026 11:30:06 *SPICE Netlist generated by Advanced Sim server on 06.02.2026 11:30:06
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
CC1 NetC1_1 VCM 1nF CC1 NetC1_1 VCM 1nF
CC2 VCM NetC2_2 1nF CC2 VCM NetC2_2 1nF
CC3 Uin NetC3_2 150pF CC3 Uin NetC3_2 150pF
XIC1A NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 NetC1_1 0 NetC1_1 BP LP NetC2_2 VAP XIC1A NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 NetC1_1 0 NetC1_1 BP LP NetC2_2 VAP
+ NetC2_2 VCM NetIC1_3 NetIC1_2 NetIC1_1 LM13700-DUAL + NetC2_2 VCM NetIC1_3 NetIC1_2 NetIC1_1 LM13700-DUAL
XIC1B NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 NetC1_1 0 NetC1_1 BP LP NetC2_2 VAP XIC1B NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 NetC1_1 0 NetC1_1 BP LP NetC2_2 VAP
+ NetC2_2 VCM NetIC1_3 NetIC1_2 NetIC1_1 LM13700-DUAL + NetC2_2 VCM NetIC1_3 NetIC1_2 NetIC1_1 LM13700-DUAL
XIC1C NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 NetC1_1 0 NetC1_1 BP LP NetC2_2 VAP XIC1C NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 NetC1_1 0 NetC1_1 BP LP NetC2_2 VAP
+ NetC2_2 VCM NetIC1_3 NetIC1_2 NetIC1_1 LM13700-DUAL + NetC2_2 VCM NetIC1_3 NetIC1_2 NetIC1_1 LM13700-DUAL
XIC1D NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 NetC1_1 0 NetC1_1 BP LP NetC2_2 VAP XIC1D NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 NetC1_1 0 NetC1_1 BP LP NetC2_2 VAP
+ NetC2_2 VCM NetIC1_3 NetIC1_2 NetIC1_1 LM13700-DUAL + NetC2_2 VCM NetIC1_3 NetIC1_2 NetIC1_1 LM13700-DUAL
XIC1E NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 NetC1_1 0 NetC1_1 BP LP NetC2_2 VAP XIC1E NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 NetC1_1 0 NetC1_1 BP LP NetC2_2 VAP
+ NetC2_2 VCM NetIC1_3 NetIC1_2 NetIC1_1 LM13700-DUAL + NetC2_2 VCM NetIC1_3 NetIC1_2 NetIC1_1 LM13700-DUAL
XIC2A VCM NetIC2_2 VAP 0 NetIC2_1 TL074 XIC2A VCM NetIC2_2 VAP 0 NetIC2_1 TL074
XIC3A NetIC3_16 NetIC3_15 NetIC3_14 NetIC3_13 NetC3_2 0 NetC3_2 HP XIC3A NetIC3_16 NetIC3_15 NetIC3_14 NetIC3_13 NetC3_2 0 NetC3_2 HP
+ ExtraNet_XIC3A_9 ExtraNet_XIC3A_10 VAP ExtraNet_XIC3A_12 ExtraNet_XIC3A_13 + ExtraNet_XIC3A_9 ExtraNet_XIC3A_10 VAP ExtraNet_XIC3A_12 ExtraNet_XIC3A_13
+ ExtraNet_XIC3A_14 ExtraNet_XIC3A_15 ExtraNet_XIC3A_16 LM13700-DUAL + ExtraNet_XIC3A_14 ExtraNet_XIC3A_15 ExtraNet_XIC3A_16 LM13700-DUAL
XIC3C NetIC3_16 NetIC3_15 NetIC3_14 NetIC3_13 NetC3_2 0 NetC3_2 HP XIC3C NetIC3_16 NetIC3_15 NetIC3_14 NetIC3_13 NetC3_2 0 NetC3_2 HP
+ ExtraNet_XIC3C_9 ExtraNet_XIC3C_10 VAP ExtraNet_XIC3C_12 ExtraNet_XIC3C_13 + ExtraNet_XIC3C_9 ExtraNet_XIC3C_10 VAP ExtraNet_XIC3C_12 ExtraNet_XIC3C_13
+ ExtraNet_XIC3C_14 ExtraNet_XIC3C_15 ExtraNet_XIC3C_16 LM13700-DUAL + ExtraNet_XIC3C_14 ExtraNet_XIC3C_15 ExtraNet_XIC3C_16 LM13700-DUAL
XIC3E NetIC3_16 NetIC3_15 NetIC3_14 NetIC3_13 NetC3_2 0 NetC3_2 HP XIC3E NetIC3_16 NetIC3_15 NetIC3_14 NetIC3_13 NetC3_2 0 NetC3_2 HP
+ ExtraNet_XIC3E_9 ExtraNet_XIC3E_10 VAP ExtraNet_XIC3E_12 ExtraNet_XIC3E_13 + ExtraNet_XIC3E_9 ExtraNet_XIC3E_10 VAP ExtraNet_XIC3E_12 ExtraNet_XIC3E_13
+ ExtraNet_XIC3E_14 ExtraNet_XIC3E_15 ExtraNet_XIC3E_16 LM13700-DUAL + ExtraNet_XIC3E_14 ExtraNet_XIC3E_15 ExtraNet_XIC3E_16 LM13700-DUAL
RR1 Uin NetIC1_14 10k RR1 Uin NetIC1_14 10k
RR2 VCM NetIC1_14 1k RR2 VCM NetIC1_14 1k
RR3 BP NetIC1_13 10k RR3 BP NetIC1_13 10k
RR4 NetIC1_13 VCM 1k RR4 NetIC1_13 VCM 1k
RR5 0 BP 5.6k RR5 0 BP 5.6k
RR6 0 LP 5.6k RR6 0 LP 5.6k
RR7 LP NetIC1_13 10k RR7 LP NetIC1_13 10k
RR8 BP NetIC1_3 33k RR8 BP NetIC1_3 33k
RR9 NetIC1_3 VCM 1k RR9 NetIC1_3 VCM 1k
RR11 NetIC3_14 VAP 330k RR11 NetIC3_14 VAP 330k
RR12 NetIC3_14 VCM 1k RR12 NetIC3_14 VCM 1k
RR13 NetIC3_13 HP 100k RR13 NetIC3_13 HP 100k
RR14 NetIC3_13 VCM 1k RR14 NetIC3_13 VCM 1k
RR15 0 HP 10k RR15 0 HP 10k
RR_abcA NetIC2_1 NetR_abc_2 {1Meg * {Q}} RR_abcA NetIC2_1 NetR_abc_2 {1Meg * {Q}}
RR_abcB NetR_abc_2 NetR_abc_2 {1Meg - (1Meg * {Q})} RR_abcB NetR_abc_2 NetR_abc_2 {1Meg - (1Meg * {Q})}
RR_abc_1 VAP div 100k RR_abc_1 VAP div 100k
RR_abc_2 div NetR_abc_2_2 22k RR_abc_2 div NetR_abc_2_2 22k
RR_abc_3 NetR_abc_2_2 VCM 3.3k RR_abc_3 NetR_abc_2_2 VCM 3.3k
RR_hilfe div NetIC2_2 1k RR_hilfe div NetIC2_2 1k
RR_hilfe2 NetIC2_2 NetIC2_1 100k RR_hilfe2 NetIC2_2 NetIC2_1 100k
VU_mess_abc NetIC3_16 NetR_abc_2 0 VU_mess_abc NetIC3_16 NetR_abc_2 0
VU_mess_abc1 NetIC1_16 NetR_abc_2 0 VU_mess_abc1 NetIC1_16 NetR_abc_2 0
VU_mess_abc2 NetIC1_1 NetR_abc_2 0 VU_mess_abc2 NetIC1_1 NetR_abc_2 0
VUe Uin VCM DC 0 SIN(0 0 440Hz 0 0 0) AC 1 0 VUe Uin VCM DC 0 SIN(0 0 440Hz 0 0 0) AC 1 0
VUneg VCM 0 +5V VUneg VCM 0 +5V
VUpos VAP VCM +5V VUpos VAP VCM +5V
.PLOT TRAN {v(div)} =PLOT(2) =AXIS(1) =NAME(div) =UNITS(V) .PLOT TRAN {v(div)} =PLOT(2) =AXIS(1) =NAME(div) =UNITS(V)
.PLOT TRAN {i(U_mess_abc1)} =PLOT(3) =AXIS(1) =NAME(I_ABC1) =UNITS(A) .PLOT TRAN {i(U_mess_abc1)} =PLOT(3) =AXIS(1) =NAME(I_ABC1) =UNITS(A)
.PLOT TRAN {i(U_mess_abc2)} =PLOT(3) =AXIS(1) =NAME(I_ABC2) =UNITS(A) .PLOT TRAN {i(U_mess_abc2)} =PLOT(3) =AXIS(1) =NAME(I_ABC2) =UNITS(A)
.PLOT TRAN {i(U_mess_abc3)} =PLOT(3) =AXIS(1) =NAME(I_ABC3) =UNITS(A) .PLOT TRAN {i(U_mess_abc3)} =PLOT(3) =AXIS(1) =NAME(I_ABC3) =UNITS(A)
.PLOT TRAN {v(Uin)} =PLOT(1) =AXIS(1) =NAME(U_E) =UNITS(V) .PLOT TRAN {v(Uin)} =PLOT(1) =AXIS(1) =NAME(U_E) =UNITS(V)
*Selected Circuit Analyses: *Selected Circuit Analyses:
.TRAN 90.91u 11.36m 0 90.91u .TRAN 90.91u 11.36m 0 90.91u
.CONTROL .CONTROL
SWEEP Q LIST 0.002 0.01 0.1 1 SWEEP Q LIST 0.002 0.01 0.1 1
.ENDC .ENDC
*Global Parameters: *Global Parameters:
.PARAM Q={0.1} .PARAM Q={0.1}
*Models and Subcircuits: *Models and Subcircuits:
* A dual opamp ngspice model * A dual opamp ngspice model
* file name: LM13700-DUAL.ckt * file name: LM13700-DUAL.ckt
.subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+ .subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+
+ 2out 2in- 2in+ 2Dbias 2ABin + 2out 2in- 2in+ 2Dbias 2ABin
*////////////////////////////////////////////////////////////////////// *//////////////////////////////////////////////////////////////////////
* (C) National Semiconductor, Inc. * (C) National Semiconductor, Inc.
* Models developed and under copyright by: * Models developed and under copyright by:
* National Semiconductor, Inc. * National Semiconductor, Inc.
*///////////////////////////////////////////////////////////////////// */////////////////////////////////////////////////////////////////////
* Legal Notice: This material is intended for free software support. * Legal Notice: This material is intended for free software support.
* The file may be copied, and distributed; however, reselling the * The file may be copied, and distributed; however, reselling the
* material is illegal * material is illegal
*//////////////////////////////////////////////////////////////////// *////////////////////////////////////////////////////////////////////
* For ordering or technical information on these models, contact: * For ordering or technical information on these models, contact:
* National Semiconductor's Customer Response Center * National Semiconductor's Customer Response Center
* 7:00 A.M.--7:00 P.M. U.S. Central Time * 7:00 A.M.--7:00 P.M. U.S. Central Time
* (800) 272-9959 * (800) 272-9959
* For Applications support, contact the Internet address: * For Applications support, contact the Internet address:
* amps-apps@galaxy.nsc.com * amps-apps@galaxy.nsc.com
* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ * \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
* LM13700 Dual Operational Transconductance Amplifier * LM13700 Dual Operational Transconductance Amplifier
* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ * \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
* *
* Amplifier Bias Input * Amplifier Bias Input
* | Diode Bias * | Diode Bias
* | | Positive Input * | | Positive Input
* | | | Negative Input * | | | Negative Input
* | | | | Output * | | | | Output
* | | | | | Negative power supply * | | | | | Negative power supply
* | | | | | | Buffer Input * | | | | | | Buffer Input
* | | | | | | | Buffer Output * | | | | | | | Buffer Output
* | | | | | | | | Positive power supply * | | | | | | | | Positive power supply
* | | | | | | | | | * | | | | | | | | |
.SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11 .SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11
* *
* Features: * Features:
* gm adjustable over 6 decades. * gm adjustable over 6 decades.
* Excellent gm linearity. * Excellent gm linearity.
* Linearizing diodes. * Linearizing diodes.
* Wide supply range of +/-2V to +/-22V. * Wide supply range of +/-2V to +/-22V.
* *
* Note: This model is single-pole in nature and over-estimates * Note: This model is single-pole in nature and over-estimates
* AC bandwidth and phase margin (stability) by over 2X. * AC bandwidth and phase margin (stability) by over 2X.
* Although refinement may be possible in the future, please * Although refinement may be possible in the future, please
* use benchtesting to finalize AC circuit design. * use benchtesting to finalize AC circuit design.
* *
* Note: Model is for single device only and simulated * Note: Model is for single device only and simulated
* supply current is 1/2 of total device current. * supply current is 1/2 of total device current.
* *
****************************************************** ******************************************************
* *
C1 6 4 4.8P C1 6 4 4.8P
C2 3 6 4.8P C2 3 6 4.8P
* Output capacitor * Output capacitor
C3 5 6 6.26P C3 5 6 6.26P
D1 2 4 DX D1 2 4 DX
D2 2 3 DX D2 2 3 DX
D3 11 21 DX D3 11 21 DX
D4 21 22 DX D4 21 22 DX
D5 1 26 DX D5 1 26 DX
D6 26 27 DX D6 26 27 DX
D7 5 29 DX D7 5 29 DX
D8 28 5 DX D8 28 5 DX
D10 31 25 DX D10 31 25 DX
* Clamp for -CMR * Clamp for -CMR
D11 28 25 DX D11 28 25 DX
* Ios source * Ios source
F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9 F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9
F2 11 5 V2 1.022 F2 11 5 V2 1.022
F3 25 6 V3 1.0 F3 25 6 V3 1.0
F4 5 6 V1 1.022 F4 5 6 V1 1.022
* Output impedance * Output impedance
F5 5 0 POLY(2) V3 V7 0 0 0 0 1 F5 5 0 POLY(2) V3 V7 0 0 0 0 1
G1 0 33 5 0 .55E-3 G1 0 33 5 0 .55E-3
I1 11 6 300U I1 11 6 300U
Q1 24 32 31 QX1 Q1 24 32 31 QX1
Q2 23 3 31 QX2 Q2 23 3 31 QX2
Q3 11 7 30 QZ Q3 11 7 30 QZ
Q4 11 30 8 QY Q4 11 30 8 QY
V1 22 24 0V V1 22 24 0V
V2 22 23 0V V2 22 23 0V
V3 27 6 0V V3 27 6 0V
V4 11 29 1.4 V4 11 29 1.4
V5 28 6 1.2 V5 28 6 1.2
V6 4 32 0V V6 4 32 0V
V7 33 0 0V V7 33 0 0V
.MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2) .MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2) .MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QY NPN (IS=6E-15 BF=50) .MODEL QY NPN (IS=6E-15 BF=50)
.MODEL QZ NPN (IS=5E-16 BF=266) .MODEL QZ NPN (IS=5E-16 BF=266)
.MODEL DX D (IS=5E-16) .MODEL DX D (IS=5E-16)
.ENDS .ENDS
*$ *$
XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS
XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS
.ends .ends
*TL074 *TL074
*Quad LoNoise JFETInput OpAmp pkg:DIP14 *Quad LoNoise JFETInput OpAmp pkg:DIP14
*+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14) *+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14)
* Connections: * Connections:
* Non-Inverting Input * Non-Inverting Input
* | Inverting Input * | Inverting Input
* | | Positive Power Supply * | | Positive Power Supply
* | | | Negative Power Supply * | | | Negative Power Supply
* | | | | Output * | | | | Output
* | | | | | * | | | | |
.SUBCKT TL074 1 2 3 4 5 .SUBCKT TL074 1 2 3 4 5
C1 11 12 3.498E-12 C1 11 12 3.498E-12
C2 6 7 15E-12 C2 6 7 15E-12
DC 5 53 DX DC 5 53 DX
DE 54 5 DX DE 54 5 DX
DLP 90 91 DX DLP 90 91 DX
DLN 92 90 DX DLN 92 90 DX
DP 4 3 DX DP 4 3 DX
BGND 99 0 V=V(3)*.5 + V(4)*.5 BGND 99 0 V=V(3)*.5 + V(4)*.5
BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 + BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
+ I(VLP)*5E6 - I(VLN)*5E6 + I(VLP)*5E6 - I(VLN)*5E6
GA 6 0 11 12 282.8E-6 GA 6 0 11 12 282.8E-6
GCM 0 6 10 99 8.942E-9 GCM 0 6 10 99 8.942E-9
ISS 3 10 DC 195E-6 ISS 3 10 DC 195E-6
HLIM 90 0 VLIM 1K HLIM 90 0 VLIM 1K
J1 11 2 10 JX J1 11 2 10 JX
J2 12 1 10 JX J2 12 1 10 JX
R2 6 9 100E3 R2 6 9 100E3
RD1 4 11 3.536E3 RD1 4 11 3.536E3
RD2 4 12 3.536E3 RD2 4 12 3.536E3
RO1 8 5 150 RO1 8 5 150
RO2 7 99 150 RO2 7 99 150
RP 3 4 2.143E3 RP 3 4 2.143E3
RSS 10 99 1.026E6 RSS 10 99 1.026E6
VB 9 0 DC 0 VB 9 0 DC 0
VC 3 53 DC 2.2 VC 3 53 DC 2.2
VE 54 4 DC 2.2 VE 54 4 DC 2.2
VLIM 7 8 DC 0 VLIM 7 8 DC 0
VLP 91 0 DC 25 VLP 91 0 DC 25
VLN 0 92 DC 25 VLN 0 92 DC 25
.MODEL DX D(IS=800E-18) .MODEL DX D(IS=800E-18)
.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1) .MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
.ENDS TL074 .ENDS TL074
.END .END

View File

@@ -1,10 +1,10 @@
Output: Mixed Sim Output: Mixed Sim
Type : AdvSimNetlist Type : AdvSimNetlist
From : Project [Filter_Test.PrjPcb] From : Project [Filter_Test.PrjPcb]
Generated File[Filter_Test.nsx] Generated File[Filter_Test.nsx]
Files Generated : 1 Files Generated : 1
Documents Printed : 0 Documents Printed : 0
Finished Output Generation At 11:26:55 On 06.02.2026 Finished Output Generation At 11:26:55 On 06.02.2026

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

View File

@@ -1 +1 @@
Record=TopLevelDocument|FileName=Offset_test.SchDoc|SheetNumber=1 Record=TopLevelDocument|FileName=Offset_test.SchDoc|SheetNumber=1

View File

@@ -1,116 +1,116 @@
Offset_test Offset_test
*SPICE Netlist generated by Advanced Sim server on 08.12.2025 23:19:26 *SPICE Netlist generated by Advanced Sim server on 08.12.2025 23:19:26
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
XIC1A NetIC1_3 VCM VAP 0 NetIC1_1 TL074 XIC1A NetIC1_3 VCM VAP 0 NetIC1_1 TL074
XIC1B pos NetIC1_6 VAP 0 saw TL074 XIC1B pos NetIC1_6 VAP 0 saw TL074
XIC1C R.VMID VCM VAP 0 VCM TL074 XIC1C R.VMID VCM VAP 0 VCM TL074
RR_a NetR_a_1 NetIC1_6 10k RR_a NetR_a_1 NetIC1_6 10k
RR_b NetR_a_1 pos 10k RR_b NetR_a_1 pos 10k
RR_c NetIC1_6 saw 10k RR_c NetIC1_6 saw 10k
RR_pd gate 0 100k RR_pd gate 0 100k
RR_S1 R.VMID VAP 220k RR_S1 R.VMID VAP 220k
RR_S2 0 R.VMID 220k RR_S2 0 R.VMID 220k
RR_vor gate NetIC1_1 100R RR_vor gate NetIC1_1 100R
QT pos gate VCM QBC547B QT pos gate VCM QBC547B
VU_single VAP 0 7.5V VU_single VAP 0 7.5V
VVin NetIC1_3 0 DC 0 PULSE(0 5 0 1u 1u 10 20) AC 1 0 VVin NetIC1_3 0 DC 0 PULSE(0 5 0 1u 1u 10 20) AC 1 0
VVin2 NetR_a_1 0 DC 0 PULSE(3.8 5 0 10 10 1u 20) AC 1 0 VVin2 NetR_a_1 0 DC 0 PULSE(3.8 5 0 10 10 1u 20) AC 1 0
.PLOT TRAN {v(Vin2)} =PLOT(1) =AXIS(1) .PLOT TRAN {v(Vin2)} =PLOT(1) =AXIS(1)
.PLOT TRAN {v(saw)} =PLOT(2) =AXIS(1) .PLOT TRAN {v(saw)} =PLOT(2) =AXIS(1)
.PLOT TRAN {v(pos)} =PLOT(3) =AXIS(1) .PLOT TRAN {v(pos)} =PLOT(3) =AXIS(1)
.PLOT TRAN {v(Vin)} =PLOT(1) =AXIS(1) .PLOT TRAN {v(Vin)} =PLOT(1) =AXIS(1)
.OPTIONS METHOD=GEAR MAXORD=2 .OPTIONS METHOD=GEAR MAXORD=2
*Selected Circuit Analyses: *Selected Circuit Analyses:
.TRAN 800.0m 100 0 800.0m .TRAN 800.0m 100 0 800.0m
*Models and Subcircuits: *Models and Subcircuits:
*TL074 *TL074
*Quad LoNoise JFETInput OpAmp pkg:DIP14 *Quad LoNoise JFETInput OpAmp pkg:DIP14
*+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14) *+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14)
* Connections: * Connections:
* Non-Inverting Input * Non-Inverting Input
* | Inverting Input * | Inverting Input
* | | Positive Power Supply * | | Positive Power Supply
* | | | Negative Power Supply * | | | Negative Power Supply
* | | | | Output * | | | | Output
* | | | | | * | | | | |
.SUBCKT TL074 1 2 3 4 5 .SUBCKT TL074 1 2 3 4 5
C1 11 12 3.498E-12 C1 11 12 3.498E-12
C2 6 7 15E-12 C2 6 7 15E-12
DC 5 53 DX DC 5 53 DX
DE 54 5 DX DE 54 5 DX
DLP 90 91 DX DLP 90 91 DX
DLN 92 90 DX DLN 92 90 DX
DP 4 3 DX DP 4 3 DX
BGND 99 0 V=V(3)*.5 + V(4)*.5 BGND 99 0 V=V(3)*.5 + V(4)*.5
BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 + BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
+ I(VLP)*5E6 - I(VLN)*5E6 + I(VLP)*5E6 - I(VLN)*5E6
GA 6 0 11 12 282.8E-6 GA 6 0 11 12 282.8E-6
GCM 0 6 10 99 8.942E-9 GCM 0 6 10 99 8.942E-9
ISS 3 10 DC 195E-6 ISS 3 10 DC 195E-6
HLIM 90 0 VLIM 1K HLIM 90 0 VLIM 1K
J1 11 2 10 JX J1 11 2 10 JX
J2 12 1 10 JX J2 12 1 10 JX
R2 6 9 100E3 R2 6 9 100E3
RD1 4 11 3.536E3 RD1 4 11 3.536E3
RD2 4 12 3.536E3 RD2 4 12 3.536E3
RO1 8 5 150 RO1 8 5 150
RO2 7 99 150 RO2 7 99 150
RP 3 4 2.143E3 RP 3 4 2.143E3
RSS 10 99 1.026E6 RSS 10 99 1.026E6
VB 9 0 DC 0 VB 9 0 DC 0
VC 3 53 DC 2.2 VC 3 53 DC 2.2
VE 54 4 DC 2.2 VE 54 4 DC 2.2
VLIM 7 8 DC 0 VLIM 7 8 DC 0
VLP 91 0 DC 25 VLP 91 0 DC 25
VLN 0 92 DC 25 VLN 0 92 DC 25
.MODEL DX D(IS=800E-18) .MODEL DX D(IS=800E-18)
.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1) .MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
.ENDS TL074 .ENDS TL074
* *
.MODEL QBC547B NPN( .MODEL QBC547B NPN(
+ IS=2.39E-14 + IS=2.39E-14
+ NF=1.008 + NF=1.008
+ ISE=3.545E-15 + ISE=3.545E-15
+ NE=1.541 + NE=1.541
+ BF=294.3 + BF=294.3
+ IKF=0.1357 + IKF=0.1357
+ VAF=63.2 + VAF=63.2
+ NR=1.004 + NR=1.004
+ ISC=6.272E-14 + ISC=6.272E-14
+ NC=1.243 + NC=1.243
+ BR=7.946 + BR=7.946
+ IKR=0.1144 + IKR=0.1144
+ VAR=25.9 + VAR=25.9
+ RB=1 + RB=1
+ IRB=1E-06 + IRB=1E-06
+ RBM=1 + RBM=1
+ RE=0.4683 + RE=0.4683
+ RC=0.85 + RC=0.85
+ XTB=0 + XTB=0
+ EG=1.11 + EG=1.11
+ XTI=3 + XTI=3
+ CJE=1.358E-11 + CJE=1.358E-11
+ VJE=0.65 + VJE=0.65
+ MJE=0.3279 + MJE=0.3279
+ TF=4.391E-10 + TF=4.391E-10
+ XTF=120 + XTF=120
+ VTF=2.643 + VTF=2.643
+ ITF=0.7495 + ITF=0.7495
+ PTF=0 + PTF=0
+ CJC=3.728E-12 + CJC=3.728E-12
+ VJC=0.3997 + VJC=0.3997
+ MJC=0.2955 + MJC=0.2955
+ XCJC=0.6193 + XCJC=0.6193
+ TR=1E-32 + TR=1E-32
+ CJS=0 + CJS=0
+ VJS=0.75 + VJS=0.75
+ MJS=0.333 + MJS=0.333
+ FC=0.9579 ) + FC=0.9579 )
.END .END

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

View File

@@ -1 +1 @@
Record=TopLevelDocument|FileName=Sheet1.SchDoc|SheetNumber=1 Record=TopLevelDocument|FileName=Sheet1.SchDoc|SheetNumber=1

View File

@@ -1,9 +1,9 @@
Change Component Designator: Old Designator=IC? New Designator=IC1 Change Component Designator: Old Designator=IC? New Designator=IC1
Change Component Designator: Old Designator=IC? New Designator=IC1 Change Component Designator: Old Designator=IC? New Designator=IC1
Change Component Designator: Old Designator=IC? New Designator=IC1 Change Component Designator: Old Designator=IC? New Designator=IC1
Change Component Designator: Old Designator=R_S? New Designator=R_S1 Change Component Designator: Old Designator=R_S? New Designator=R_S1
Change Component Designator: Old Designator=R_S? New Designator=R_S2 Change Component Designator: Old Designator=R_S? New Designator=R_S2
Change Component Designator: Old Designator=Rb? New Designator=Rb1 Change Component Designator: Old Designator=Rb? New Designator=Rb1
Change Component Designator: Old Designator=Rc? New Designator=Rc1 Change Component Designator: Old Designator=Rc? New Designator=Rc1
Change Component Designator: Old Designator=U_single? New Designator=U_single1 Change Component Designator: Old Designator=U_single? New Designator=U_single1
Change Component Designator: Old Designator=U_var? New Designator=U_var1 Change Component Designator: Old Designator=U_var? New Designator=U_var1

View File

@@ -1,76 +1,76 @@
Offset_test2 Offset_test2
*SPICE Netlist generated by Advanced Sim server on 08.12.2025 19:05:32 *SPICE Netlist generated by Advanced Sim server on 08.12.2025 19:05:32
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
XIC1A R.VMID VCM VAP 0 VCM TL074 XIC1A R.VMID VCM VAP 0 VCM TL074
XIC1B VCM u_inv VAP 0 U_CV_off TL074 XIC1B VCM u_inv VAP 0 U_CV_off TL074
XIC1C VCM NetIC1_9 VAP 0 -U_CV_off TL074 XIC1C VCM NetIC1_9 VAP 0 -U_CV_off TL074
RR_inv_a U_CV_off NetIC1_9 1K RR_inv_a U_CV_off NetIC1_9 1K
RR_inv_b NetIC1_9 -U_CV_off 1K RR_inv_b NetIC1_9 -U_CV_off 1K
RR_S1 R.VMID VAP 220k RR_S1 R.VMID VAP 220k
RR_S2 0 R.VMID 220k RR_S2 0 R.VMID 220k
RRa VAP u_inv 1k RRa VAP u_inv 1k
RRb1 NetRb1_1 u_inv 1K RRb1 NetRb1_1 u_inv 1K
RRc1 u_inv U_CV_off 1K RRc1 u_inv U_CV_off 1K
VU_single1 VAP 0 +10V VU_single1 VAP 0 +10V
VU_var NetRb1_1 0 0 VU_var NetRb1_1 0 0
.PLOT TRAN {v(U_CV_off)} =PLOT(1) =AXIS(1) .PLOT TRAN {v(U_CV_off)} =PLOT(1) =AXIS(1)
.PLOT TRAN {v(Rb1)} =PLOT(2) =AXIS(1) .PLOT TRAN {v(Rb1)} =PLOT(2) =AXIS(1)
.PLOT TRAN {v(u_inv)} =PLOT(3) =AXIS(1) .PLOT TRAN {v(u_inv)} =PLOT(3) =AXIS(1)
.PLOT TRAN {v(Ra)} =PLOT(2) =AXIS(1) =UNITS(V) .PLOT TRAN {v(Ra)} =PLOT(2) =AXIS(1) =UNITS(V)
.PLOT TRAN {v(-U_CV_off)} =PLOT(1) =AXIS(1) .PLOT TRAN {v(-U_CV_off)} =PLOT(1) =AXIS(1)
*Selected Circuit Analyses: *Selected Circuit Analyses:
.TRAN 0.1u 5u 0 0.1u .TRAN 0.1u 5u 0 0.1u
.CONTROL .CONTROL
SWEEP Ra LIST 833R 1k 1.25k SWEEP Ra LIST 833R 1k 1.25k
.ENDC .ENDC
*Models and Subcircuits: *Models and Subcircuits:
*TL074 *TL074
*Quad LoNoise JFETInput OpAmp pkg:DIP14 *Quad LoNoise JFETInput OpAmp pkg:DIP14
*+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14) *+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14)
* Connections: * Connections:
* Non-Inverting Input * Non-Inverting Input
* | Inverting Input * | Inverting Input
* | | Positive Power Supply * | | Positive Power Supply
* | | | Negative Power Supply * | | | Negative Power Supply
* | | | | Output * | | | | Output
* | | | | | * | | | | |
.SUBCKT TL074 1 2 3 4 5 .SUBCKT TL074 1 2 3 4 5
C1 11 12 3.498E-12 C1 11 12 3.498E-12
C2 6 7 15E-12 C2 6 7 15E-12
DC 5 53 DX DC 5 53 DX
DE 54 5 DX DE 54 5 DX
DLP 90 91 DX DLP 90 91 DX
DLN 92 90 DX DLN 92 90 DX
DP 4 3 DX DP 4 3 DX
BGND 99 0 V=V(3)*.5 + V(4)*.5 BGND 99 0 V=V(3)*.5 + V(4)*.5
BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 + BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
+ I(VLP)*5E6 - I(VLN)*5E6 + I(VLP)*5E6 - I(VLN)*5E6
GA 6 0 11 12 282.8E-6 GA 6 0 11 12 282.8E-6
GCM 0 6 10 99 8.942E-9 GCM 0 6 10 99 8.942E-9
ISS 3 10 DC 195E-6 ISS 3 10 DC 195E-6
HLIM 90 0 VLIM 1K HLIM 90 0 VLIM 1K
J1 11 2 10 JX J1 11 2 10 JX
J2 12 1 10 JX J2 12 1 10 JX
R2 6 9 100E3 R2 6 9 100E3
RD1 4 11 3.536E3 RD1 4 11 3.536E3
RD2 4 12 3.536E3 RD2 4 12 3.536E3
RO1 8 5 150 RO1 8 5 150
RO2 7 99 150 RO2 7 99 150
RP 3 4 2.143E3 RP 3 4 2.143E3
RSS 10 99 1.026E6 RSS 10 99 1.026E6
VB 9 0 DC 0 VB 9 0 DC 0
VC 3 53 DC 2.2 VC 3 53 DC 2.2
VE 54 4 DC 2.2 VE 54 4 DC 2.2
VLIM 7 8 DC 0 VLIM 7 8 DC 0
VLP 91 0 DC 25 VLP 91 0 DC 25
VLN 0 92 DC 25 VLN 0 92 DC 25
.MODEL DX D(IS=800E-18) .MODEL DX D(IS=800E-18)
.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1) .MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
.ENDS TL074 .ENDS TL074
.END .END

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

View File

@@ -1 +1 @@
Record=TopLevelDocument|FileName=Current_Mirror.SchDoc|SheetNumber=1 Record=TopLevelDocument|FileName=Current_Mirror.SchDoc|SheetNumber=1

View File

@@ -1,41 +1,41 @@
Current_Mirror Current_Mirror
*SPICE Netlist generated by Advanced Sim server on 03.11.2025 08:15:48 *SPICE Netlist generated by Advanced Sim server on 03.11.2025 08:15:48
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
EE_npn NetE_npn_3 Vee Uvar 0 1 EE_npn NetE_npn_3 Vee Uvar 0 1
EE_pnp Vcc NetE_pnp_4 Uvar 0 1 EE_pnp Vcc NetE_pnp_4 Uvar 0 1
II_ref 0 0 6mA II_ref 0 0 6mA
RR_npn Vcc NetR_npn_2 1.68k RR_npn Vcc NetR_npn_2 1.68k
RR_pnp NetR_pnp_1 Vee 1.67k RR_pnp NetR_pnp_1 Vee 1.67k
QT_npn_a NetR_npn_2 NetR_npn_2 Vee 2N2222 QT_npn_a NetR_npn_2 NetR_npn_2 Vee 2N2222
QT_npn_b NetE_npn_3 NetR_npn_2 Vee 2N2222 QT_npn_b NetE_npn_3 NetR_npn_2 Vee 2N2222
QT_pnp_a NetR_pnp_1 NetR_pnp_1 Vcc 2N2907 QT_pnp_a NetR_pnp_1 NetR_pnp_1 Vcc 2N2907
QT_pnp_b NetE_pnp_4 NetR_pnp_1 Vcc 2N2907 QT_pnp_b NetE_pnp_4 NetR_pnp_1 Vcc 2N2907
VUneg 0 Vee +5V VUneg 0 Vee +5V
VUpos Vcc 0 +5V VUpos Vcc 0 +5V
VUsweep Uvar 0 0V VUsweep Uvar 0 0V
.PLOT DC {i(I_ref)} =PLOT(1) =AXIS(1) =NAME(I_ref) =UNITS(A) .PLOT DC {i(I_ref)} =PLOT(1) =AXIS(1) =NAME(I_ref) =UNITS(A)
.PLOT DC {ic(T_npn_b)} =PLOT(1) =AXIS(1) =NAME(ic_NPN) =UNITS(A) .PLOT DC {ic(T_npn_b)} =PLOT(1) =AXIS(1) =NAME(ic_NPN) =UNITS(A)
.PLOT DC {ic(T_pnp_b)} =PLOT(1) =AXIS(1) =NAME(ic_PNP) =UNITS(A) .PLOT DC {ic(T_pnp_b)} =PLOT(1) =AXIS(1) =NAME(ic_PNP) =UNITS(A)
*Selected Circuit Analyses: *Selected Circuit Analyses:
.DC Usweep 9 11 0.25 .DC Usweep 9 11 0.25
*Models and Subcircuits: *Models and Subcircuits:
*2N2222 MCE 5-20-97 *2N2222 MCE 5-20-97
*Ref: Motorola Small-Signal Device Databook, Q4/94 *Ref: Motorola Small-Signal Device Databook, Q4/94
*Si 400mW 30V 800mA 300MHz GenPurp pkg:TO-18 3,2,1 *Si 400mW 30V 800mA 300MHz GenPurp pkg:TO-18 3,2,1
.MODEL 2N2222 NPN (IS=81.2F NF=1 BF=195 VAF=98.6 IKF=0.48 ISE=53.7P NE=2 .MODEL 2N2222 NPN (IS=81.2F NF=1 BF=195 VAF=98.6 IKF=0.48 ISE=53.7P NE=2
+ BR=4 NR=1 VAR=20 IKR=0.72 RE=64.4M RB=0.258 RC=25.8M XTB=1.5 + BR=4 NR=1 VAR=20 IKR=0.72 RE=64.4M RB=0.258 RC=25.8M XTB=1.5
+ CJE=89.5P VJE=1.1 MJE=0.5 CJC=28.9P VJC=0.3 MJC=0.3 TF=530P TR=368N) + CJE=89.5P VJE=1.1 MJE=0.5 CJC=28.9P VJC=0.3 MJC=0.3 TF=530P TR=368N)
*2N2907 MCE 5-27-97 *2N2907 MCE 5-27-97
*Ref: Motorola Small-Signal Device databook, Q4/94 *Ref: Motorola Small-Signal Device databook, Q4/94
*Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1 *Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1
.MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2 .MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2
+ BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5 + BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5
+ CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N) + CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N)
.END .END

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

View File

@@ -1,115 +1,115 @@
Push_Pull_Stage Push_Pull_Stage
*SPICE Netlist generated by Advanced Sim server on 18.11.2025 15:22:46 *SPICE Netlist generated by Advanced Sim server on 18.11.2025 15:22:46
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
XIC1A NetIC1_3 U_Out_a Vcc Vee NetIC1_1 TL072 XIC1A NetIC1_3 U_Out_a Vcc Vee NetIC1_1 TL072
XIC1B NetIC1_5 U_Out_b Vcc Vee NetIC1_7 TL072 XIC1B NetIC1_5 U_Out_b Vcc Vee NetIC1_7 TL072
RR_headset U_Out_b 0 32R RR_headset U_Out_b 0 32R
RR_npn_a Vcc NetR_npn_a_2 580R RR_npn_a Vcc NetR_npn_a_2 580R
RR_npn_b Vcc NetR_npn_b_2 1.68k RR_npn_b Vcc NetR_npn_b_2 1.68k
RR_pnp_a NetR_pnp_a_1 Vee 575R RR_pnp_a NetR_pnp_a_1 Vee 575R
RR_pnp_b NetR_pnp_b_1 Vee 1.67k RR_pnp_b NetR_pnp_b_1 Vee 1.67k
RR_speaker U_Out_a 0 8R RR_speaker U_Out_a 0 8R
RR_vor_src_a NetR_vor_src_a_1 NetIC1_1 402.07R RR_vor_src_a NetR_vor_src_a_1 NetIC1_1 402.07R
RR_vor_src_b NetR_vor_src_b_1 NetR_vor_src_a_1 404.15R RR_vor_src_b NetR_vor_src_b_1 NetR_vor_src_a_1 404.15R
RR_vor_src_c NetR_vor_src_c_1 NetIC1_7 940.33R RR_vor_src_c NetR_vor_src_c_1 NetIC1_7 940.33R
RR_vor_src_d NetR_vor_src_d_1 NetR_vor_src_c_1 1.167k RR_vor_src_d NetR_vor_src_d_1 NetR_vor_src_c_1 1.167k
QT1_a Vcc NetIC1_1 U_Out_a BD135_137_139 QT1_a Vcc NetIC1_1 U_Out_a BD135_137_139
QT1_b Vee NetR_vor_src_b_1 U_Out_a BD136_138_140 QT1_b Vee NetR_vor_src_b_1 U_Out_a BD136_138_140
QT1_c Vcc NetIC1_7 U_Out_b BD135_137_139 QT1_c Vcc NetIC1_7 U_Out_b BD135_137_139
QT1_d Vee NetR_vor_src_d_1 U_Out_b BD136_138_140 QT1_d Vee NetR_vor_src_d_1 U_Out_b BD136_138_140
QT_npn_a NetR_npn_a_2 NetR_npn_a_2 Vee 2N2222 QT_npn_a NetR_npn_a_2 NetR_npn_a_2 Vee 2N2222
QT_npn_b NetR_vor_src_b_1 NetR_npn_a_2 Vee 2N2222 QT_npn_b NetR_vor_src_b_1 NetR_npn_a_2 Vee 2N2222
QT_npn_c NetR_npn_b_2 NetR_npn_b_2 Vee 2N2222 QT_npn_c NetR_npn_b_2 NetR_npn_b_2 Vee 2N2222
QT_npn_d NetR_vor_src_d_1 NetR_npn_b_2 Vee 2N2222 QT_npn_d NetR_vor_src_d_1 NetR_npn_b_2 Vee 2N2222
QT_pnp_a NetR_pnp_a_1 NetR_pnp_a_1 Vcc 2N2907 QT_pnp_a NetR_pnp_a_1 NetR_pnp_a_1 Vcc 2N2907
QT_pnp_b NetIC1_1 NetR_pnp_a_1 Vcc 2N2907 QT_pnp_b NetIC1_1 NetR_pnp_a_1 Vcc 2N2907
QT_pnp_c NetR_pnp_b_1 NetR_pnp_b_1 Vcc 2N2907 QT_pnp_c NetR_pnp_b_1 NetR_pnp_b_1 Vcc 2N2907
QT_pnp_d NetIC1_7 NetR_pnp_b_1 Vcc 2N2907 QT_pnp_d NetIC1_7 NetR_pnp_b_1 Vcc 2N2907
QT_vor_src_a NetIC1_1 NetR_vor_src_a_1 NetR_vor_src_b_1 2N2222 QT_vor_src_a NetIC1_1 NetR_vor_src_a_1 NetR_vor_src_b_1 2N2222
QT_vor_src_b NetIC1_7 NetR_vor_src_c_1 NetR_vor_src_d_1 2N2222 QT_vor_src_b NetIC1_7 NetR_vor_src_c_1 NetR_vor_src_d_1 2N2222
VUin_a NetIC1_3 0 DC 0 SIN(0 2.7V 440Hz 0 0 0) AC 1 0 VUin_a NetIC1_3 0 DC 0 SIN(0 2.7V 440Hz 0 0 0) AC 1 0
VUin_b NetIC1_5 0 DC 0 SIN(0 2.7V 440Hz 0 0 0) AC 1 0 VUin_b NetIC1_5 0 DC 0 SIN(0 2.7V 440Hz 0 0 0) AC 1 0
VUneg 0 Vee +5V VUneg 0 Vee +5V
VUpos Vcc 0 +5V VUpos Vcc 0 +5V
.PLOT TRAN {v(R_speaker)} =PLOT(1) =AXIS(1) =NAME(U_Out) =UNITS(V) .PLOT TRAN {v(R_speaker)} =PLOT(1) =AXIS(1) =NAME(U_Out) =UNITS(V)
.PLOT TRAN {i(R_speaker)} =PLOT(2) =AXIS(1) =NAME(i_Speaker) =UNITS(A) .PLOT TRAN {i(R_speaker)} =PLOT(2) =AXIS(1) =NAME(i_Speaker) =UNITS(A)
.PLOT TRAN {p(R_speaker)} =PLOT(3) =AXIS(1) =NAME(P_speaker) =UNITS(W) .PLOT TRAN {p(R_speaker)} =PLOT(3) =AXIS(1) =NAME(P_speaker) =UNITS(W)
.PLOT TRAN {v(Uin_b)} =PLOT(1) =AXIS(1) =NAME(Uin) =UNITS(V) .PLOT TRAN {v(Uin_b)} =PLOT(1) =AXIS(1) =NAME(Uin) =UNITS(V)
*Selected Circuit Analyses: *Selected Circuit Analyses:
.TRAN 45u 7m 0 45u .TRAN 45u 7m 0 45u
*Models and Subcircuits: *Models and Subcircuits:
*TL072 *TL072
*Dual LoNoise JFETInput OpAmp pkg:DIP8 (A:3,2,8,4,1)(B:5,6,8,4,7) *Dual LoNoise JFETInput OpAmp pkg:DIP8 (A:3,2,8,4,1)(B:5,6,8,4,7)
* Connections: * Connections:
* Non-Inverting Input * Non-Inverting Input
* | Inverting Input * | Inverting Input
* | | Positive Power Supply * | | Positive Power Supply
* | | | Negative Power Supply * | | | Negative Power Supply
* | | | | Output * | | | | Output
* | | | | | * | | | | |
.SUBCKT TL072 1 2 3 4 5 .SUBCKT TL072 1 2 3 4 5
C1 11 12 3.498E-12 C1 11 12 3.498E-12
C2 6 7 15E-12 C2 6 7 15E-12
DC 5 53 DX DC 5 53 DX
DE 54 5 DX DE 54 5 DX
DLP 90 91 DX DLP 90 91 DX
DLN 92 90 DX DLN 92 90 DX
DP 4 3 DX DP 4 3 DX
BGND 99 0 V=V(3)*.5 + V(4)*.5 BGND 99 0 V=V(3)*.5 + V(4)*.5
BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 + BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
+ I(VLP)*5E6 - I(VLN)*5E6 + I(VLP)*5E6 - I(VLN)*5E6
GA 6 0 11 12 282.8E-6 GA 6 0 11 12 282.8E-6
GCM 0 6 10 99 8.942E-9 GCM 0 6 10 99 8.942E-9
ISS 3 10 DC 195E-6 ISS 3 10 DC 195E-6
HLIM 90 0 VLIM 1K HLIM 90 0 VLIM 1K
J1 11 2 10 JX J1 11 2 10 JX
J2 12 1 10 JX J2 12 1 10 JX
R2 6 9 100E3 R2 6 9 100E3
RD1 4 11 3.536E3 RD1 4 11 3.536E3
RD2 4 12 3.536E3 RD2 4 12 3.536E3
RO1 8 5 150 RO1 8 5 150
RO2 7 99 150 RO2 7 99 150
RP 3 4 2.143E3 RP 3 4 2.143E3
RSS 10 99 1.026E6 RSS 10 99 1.026E6
VB 9 0 DC 0 VB 9 0 DC 0
VC 3 53 DC 2.2 VC 3 53 DC 2.2
VE 54 4 DC 2.2 VE 54 4 DC 2.2
VLIM 7 8 DC 0 VLIM 7 8 DC 0
VLP 91 0 DC 25 VLP 91 0 DC 25
VLN 0 92 DC 25 VLN 0 92 DC 25
.MODEL DX D(IS=800E-18) .MODEL DX D(IS=800E-18)
.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1) .MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
.ENDS TL072 .ENDS TL072
.MODEL BD135_137_139 NPN (IS=2.3985E-13 BF=244.9 NF=1.0 BR=78.11 NR=1.007 .MODEL BD135_137_139 NPN (IS=2.3985E-13 BF=244.9 NF=1.0 BR=78.11 NR=1.007
+ ISE=1.0471E-14 NE=1.2 ISC=1.9314E-11 NC=1.45 VAF=98.5 VAR=7.46 IKF=1.1863 + ISE=1.0471E-14 NE=1.2 ISC=1.9314E-11 NC=1.45 VAF=98.5 VAR=7.46 IKF=1.1863
+ IKR=0.1445 RB=2.14 RBM=0.001 IRB=0.031 RE=0.0832 RC=0.01 CJE=2.92702E-10 + IKR=0.1445 RB=2.14 RBM=0.001 IRB=0.031 RE=0.0832 RC=0.01 CJE=2.92702E-10
+ VJE=0.67412 MJE=0.3300 FC=0.5 CJC=4.8831E-11 VJC=0.5258 MJC=0.3928 + VJE=0.67412 MJE=0.3300 FC=0.5 CJC=4.8831E-11 VJC=0.5258 MJC=0.3928
+ XCJC =0.5287 XTB=1.1398 EG=1.2105 XTI=3.0 ) + XCJC =0.5287 XTB=1.1398 EG=1.2105 XTI=3.0 )
.MODEL BD136_138_140 PNP (IS=2.9537E-13 BF=201.4 NF=1.0 BR=23.765 .MODEL BD136_138_140 PNP (IS=2.9537E-13 BF=201.4 NF=1.0 BR=23.765
+ NR=1.021 ISE=1.8002E-13 NE=1.5 ISC=7.0433E-12 NC=1.38 VAF=137.0 + NR=1.021 ISE=1.8002E-13 NE=1.5 ISC=7.0433E-12 NC=1.38 VAF=137.0
+ VAR=8.41 IKF=1.0993 IKR=0.10 RB=1.98 RBM=0.01 IRB=0.011 RE=0.1109 + VAR=8.41 IKF=1.0993 IKR=0.10 RB=1.98 RBM=0.01 IRB=0.011 RE=0.1109
+ RC=0.01 CJE=2.1982E-10 VJE=0.7211 MJE=0.3685 FC=0.5 CJC=6.8291E-11 + RC=0.01 CJE=2.1982E-10 VJE=0.7211 MJE=0.3685 FC=0.5 CJC=6.8291E-11
+ VJC=0.5499 MJC=0.3668 XCJC=0.5287 XTB=1.4883 EG=1.2343 XTI=3.0) + VJC=0.5499 MJC=0.3668 XCJC=0.5287 XTB=1.4883 EG=1.2343 XTI=3.0)
*2N2222 MCE 5-20-97 *2N2222 MCE 5-20-97
*Ref: Motorola Small-Signal Device Databook, Q4/94 *Ref: Motorola Small-Signal Device Databook, Q4/94
*Si 400mW 30V 800mA 300MHz GenPurp pkg:TO-18 3,2,1 *Si 400mW 30V 800mA 300MHz GenPurp pkg:TO-18 3,2,1
.MODEL 2N2222 NPN (IS=81.2F NF=1 BF=195 VAF=98.6 IKF=0.48 ISE=53.7P NE=2 .MODEL 2N2222 NPN (IS=81.2F NF=1 BF=195 VAF=98.6 IKF=0.48 ISE=53.7P NE=2
+ BR=4 NR=1 VAR=20 IKR=0.72 RE=64.4M RB=0.258 RC=25.8M XTB=1.5 + BR=4 NR=1 VAR=20 IKR=0.72 RE=64.4M RB=0.258 RC=25.8M XTB=1.5
+ CJE=89.5P VJE=1.1 MJE=0.5 CJC=28.9P VJC=0.3 MJC=0.3 TF=530P TR=368N) + CJE=89.5P VJE=1.1 MJE=0.5 CJC=28.9P VJC=0.3 MJC=0.3 TF=530P TR=368N)
*2N2907 MCE 5-27-97 *2N2907 MCE 5-27-97
*Ref: Motorola Small-Signal Device databook, Q4/94 *Ref: Motorola Small-Signal Device databook, Q4/94
*Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1 *Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1
.MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2 .MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2
+ BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5 + BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5
+ CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N) + CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N)
.END .END

View File

@@ -1,10 +1,10 @@
Output: Mixed Sim Output: Mixed Sim
Type : AdvSimNetlist Type : AdvSimNetlist
From : Project [Push_Pull_Stage.PrjPcb] From : Project [Push_Pull_Stage.PrjPcb]
Generated File[Push_Pull_Stage.nsx] Generated File[Push_Pull_Stage.nsx]
Files Generated : 1 Files Generated : 1
Documents Printed : 0 Documents Printed : 0
Finished Output Generation At 15:22:22 On 18.11.2025 Finished Output Generation At 15:22:22 On 18.11.2025

File diff suppressed because one or more lines are too long

View File

@@ -1 +1 @@
Record=TopLevelDocument|FileName=Push_Pull_Stage.SchDoc|SheetNumber=1 Record=TopLevelDocument|FileName=Push_Pull_Stage.SchDoc|SheetNumber=1

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

View File

@@ -1,24 +1,24 @@
U_vor_src U_vor_src
*SPICE Netlist generated by Advanced Sim server on 02.11.2025 21:57:18 *SPICE Netlist generated by Advanced Sim server on 02.11.2025 21:57:18
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
II_cm 0 U_vor 17.32mA II_cm 0 U_vor 17.32mA
RR_vor_src_a NetR_vor_src_a_1 U_vor 6.778k RR_vor_src_a NetR_vor_src_a_1 U_vor 6.778k
RR_vor_src_b 0 NetR_vor_src_a_1 8.083k RR_vor_src_b 0 NetR_vor_src_a_1 8.083k
QT_vor_src U_vor NetR_vor_src_a_1 0 2N2222 QT_vor_src U_vor NetR_vor_src_a_1 0 2N2222
.PLOT TRAN {v(U_vor)} =PLOT(1) =AXIS(1) =NAME(U_vor) =UNITS(V) .PLOT TRAN {v(U_vor)} =PLOT(1) =AXIS(1) =NAME(U_vor) =UNITS(V)
*Selected Circuit Analyses: *Selected Circuit Analyses:
.TRAN 0.1u 5u 0 0.1u .TRAN 0.1u 5u 0 0.1u
*Models and Subcircuits: *Models and Subcircuits:
*2N2222 MCE 5-20-97 *2N2222 MCE 5-20-97
*Ref: Motorola Small-Signal Device Databook, Q4/94 *Ref: Motorola Small-Signal Device Databook, Q4/94
*Si 400mW 30V 800mA 300MHz GenPurp pkg:TO-18 3,2,1 *Si 400mW 30V 800mA 300MHz GenPurp pkg:TO-18 3,2,1
.MODEL 2N2222 NPN (IS=81.2F NF=1 BF=195 VAF=98.6 IKF=0.48 ISE=53.7P NE=2 .MODEL 2N2222 NPN (IS=81.2F NF=1 BF=195 VAF=98.6 IKF=0.48 ISE=53.7P NE=2
+ BR=4 NR=1 VAR=20 IKR=0.72 RE=64.4M RB=0.258 RC=25.8M XTB=1.5 + BR=4 NR=1 VAR=20 IKR=0.72 RE=64.4M RB=0.258 RC=25.8M XTB=1.5
+ CJE=89.5P VJE=1.1 MJE=0.5 CJC=28.9P VJC=0.3 MJC=0.3 TF=530P TR=368N) + CJE=89.5P VJE=1.1 MJE=0.5 CJC=28.9P VJC=0.3 MJC=0.3 TF=530P TR=368N)
.END .END

File diff suppressed because one or more lines are too long

View File

@@ -1 +1 @@
Record=TopLevelDocument|FileName=U_vor_src.SchDoc|SheetNumber=1 Record=TopLevelDocument|FileName=U_vor_src.SchDoc|SheetNumber=1

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

View File

@@ -1,9 +1,9 @@
Change Component Designator: Old Designator=I? New Designator=I1 Change Component Designator: Old Designator=I? New Designator=I1
Change Component Designator: Old Designator=IC? New Designator=IC1 Change Component Designator: Old Designator=IC? New Designator=IC1
Change Component Designator: Old Designator=IC? New Designator=IC1 Change Component Designator: Old Designator=IC? New Designator=IC1
Change Component Designator: Old Designator=IC? New Designator=IC1 Change Component Designator: Old Designator=IC? New Designator=IC1
Change Component Designator: Old Designator=R? New Designator=R1 Change Component Designator: Old Designator=R? New Designator=R1
Change Component Designator: Old Designator=R? New Designator=R2 Change Component Designator: Old Designator=R? New Designator=R2
Change Component Designator: Old Designator=R? New Designator=R3 Change Component Designator: Old Designator=R? New Designator=R3
Change Component Designator: Old Designator=R? New Designator=R4 Change Component Designator: Old Designator=R? New Designator=R4
Change Component Designator: Old Designator=R? New Designator=R5 Change Component Designator: Old Designator=R? New Designator=R5

View File

@@ -1,10 +1,10 @@
Output: Mixed Sim Output: Mixed Sim
Type : AdvSimNetlist Type : AdvSimNetlist
From : Project [VCA_LM13700.PrjPcb] From : Project [VCA_LM13700.PrjPcb]
Generated File[VCA_LM13700.nsx] Generated File[VCA_LM13700.nsx]
Files Generated : 1 Files Generated : 1
Documents Printed : 0 Documents Printed : 0
Finished Output Generation At 11:31:57 On 06.02.2026 Finished Output Generation At 11:31:57 On 06.02.2026

View File

@@ -1,190 +1,190 @@
VCA_LM13700 VCA_LM13700
*SPICE Netlist generated by Advanced Sim server on 06.02.2026 11:37:11 *SPICE Netlist generated by Advanced Sim server on 06.02.2026 11:37:11
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
XIC1A NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 OUT 0 OUT Uout ExtraNet_XIC1A_9 XIC1A NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 OUT 0 OUT Uout ExtraNet_XIC1A_9
+ ExtraNet_XIC1A_10 VAP ExtraNet_XIC1A_12 ExtraNet_XIC1A_13 ExtraNet_XIC1A_14 + ExtraNet_XIC1A_10 VAP ExtraNet_XIC1A_12 ExtraNet_XIC1A_13 ExtraNet_XIC1A_14
+ ExtraNet_XIC1A_15 ExtraNet_XIC1A_16 LM13700-DUAL + ExtraNet_XIC1A_15 ExtraNet_XIC1A_16 LM13700-DUAL
XIC1C NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 OUT 0 OUT Uout ExtraNet_XIC1C_9 XIC1C NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 OUT 0 OUT Uout ExtraNet_XIC1C_9
+ ExtraNet_XIC1C_10 VAP ExtraNet_XIC1C_12 ExtraNet_XIC1C_13 ExtraNet_XIC1C_14 + ExtraNet_XIC1C_10 VAP ExtraNet_XIC1C_12 ExtraNet_XIC1C_13 ExtraNet_XIC1C_14
+ ExtraNet_XIC1C_15 ExtraNet_XIC1C_16 LM13700-DUAL + ExtraNet_XIC1C_15 ExtraNet_XIC1C_16 LM13700-DUAL
XIC1E NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 OUT 0 OUT Uout ExtraNet_XIC1E_9 XIC1E NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 OUT 0 OUT Uout ExtraNet_XIC1E_9
+ ExtraNet_XIC1E_10 VAP ExtraNet_XIC1E_12 ExtraNet_XIC1E_13 ExtraNet_XIC1E_14 + ExtraNet_XIC1E_10 VAP ExtraNet_XIC1E_12 ExtraNet_XIC1E_13 ExtraNet_XIC1E_14
+ ExtraNet_XIC1E_15 ExtraNet_XIC1E_16 LM13700-DUAL + ExtraNet_XIC1E_15 ExtraNet_XIC1E_16 LM13700-DUAL
RR1 NetIC1_14 IN 3.3k RR1 NetIC1_14 IN 3.3k
RR2a OUT NetR2a_2 20k RR2a OUT NetR2a_2 20k
RR2b NetR2a_2 VCM 6.8k RR2b NetR2a_2 VCM 6.8k
RR3 Uout 0 5.1k RR3 Uout 0 5.1k
RR4 VCM NetIC1_14 1.2k RR4 VCM NetIC1_14 1.2k
RR5 VCM NetIC1_13 1.2k RR5 VCM NetIC1_13 1.2k
RR_B NetR_B_1 NetR_B_2 100k RR_B NetR_B_1 NetR_B_2 100k
RR_BASE_GAIN NetIC1_16 NetR_BASE_GAIN_2 10k RR_BASE_GAIN NetIC1_16 NetR_BASE_GAIN_2 10k
RR_D VAP NetIC1_15 5.1k RR_D VAP NetIC1_15 5.1k
RR_GAINA NetR_BASE_GAIN_2 NetR_BASE_GAIN_2 {100k * {GAIN}} RR_GAINA NetR_BASE_GAIN_2 NetR_BASE_GAIN_2 {100k * {GAIN}}
RR_GAINB NetR_BASE_GAIN_2 U_ABC {100k - (100k * {GAIN})} RR_GAINB NetR_BASE_GAIN_2 U_ABC {100k - (100k * {GAIN})}
QT VAP NetR_B_1 U_ABC QBC547B QT VAP NetR_B_1 U_ABC QBC547B
VU_VCO_EN NetR_B_2 0 DC 0 PULSE(3.3 0 0 4u 1u 20m 40m) AC 1 0 VU_VCO_EN NetR_B_2 0 DC 0 PULSE(3.3 0 0 4u 1u 20m 40m) AC 1 0
VUin IN VCM DC 0 SIN(0 0 440Hz 0 0 0) AC 1 0 VUin IN VCM DC 0 SIN(0 0 440Hz 0 0 0) AC 1 0
VUneg VCM 0 +5V VUneg VCM 0 +5V
VUpos VAP VCM +5V VUpos VAP VCM +5V
.PLOT TRAN {v(IN)} =PLOT(1) =AXIS(1) =NAME(Uin) =UNITS(V) .PLOT TRAN {v(IN)} =PLOT(1) =AXIS(1) =NAME(Uin) =UNITS(V)
.PLOT TRAN {v(OUT)} =PLOT(2) =AXIS(1) =NAME(Uout) =UNITS(V) .PLOT TRAN {v(OUT)} =PLOT(2) =AXIS(1) =NAME(Uout) =UNITS(V)
.PLOT TRAN {v(U_VCO_EN)} =PLOT(3) =AXIS(1) =NAME(VCO_EN) =UNITS(V) .PLOT TRAN {v(U_VCO_EN)} =PLOT(3) =AXIS(1) =NAME(VCO_EN) =UNITS(V)
.PLOT TRAN {ie(T)} =PLOT(4) =AXIS(1) =NAME(I_ABC) =UNITS(A) .PLOT TRAN {ie(T)} =PLOT(4) =AXIS(1) =NAME(I_ABC) =UNITS(A)
.PLOT TRAN {ib(T)} =PLOT(5) =AXIS(1) =NAME(I_B) =UNITS(A) .PLOT TRAN {ib(T)} =PLOT(5) =AXIS(1) =NAME(I_B) =UNITS(A)
.PLOT TRAN {i(R5)} =PLOT(6) =AXIS(1) =NAME(I_5) =UNITS(A) .PLOT TRAN {i(R5)} =PLOT(6) =AXIS(1) =NAME(I_5) =UNITS(A)
.PLOT TRAN {i(R4)} =PLOT(6) =AXIS(1) =NAME(I_4) =UNITS(A) .PLOT TRAN {i(R4)} =PLOT(6) =AXIS(1) =NAME(I_4) =UNITS(A)
.PLOT TRAN {2*(v(Uout)*0.663)} =PLOT(2) =AXIS(1) =NAME(Uout_buffer) =UNITS(V) .PLOT TRAN {2*(v(Uout)*0.663)} =PLOT(2) =AXIS(1) =NAME(Uout_buffer) =UNITS(V)
.PLOT TRAN {v(U_ABC)} =PLOT(7) =AXIS(1) =NAME(U_ABC) =UNITS(V) .PLOT TRAN {v(U_ABC)} =PLOT(7) =AXIS(1) =NAME(U_ABC) =UNITS(V)
.OPTIONS METHOD=GEAR MAXORD=2 .OPTIONS METHOD=GEAR MAXORD=2
*Selected Circuit Analyses: *Selected Circuit Analyses:
.TRAN 45u 100m 20m 45u .TRAN 45u 100m 20m 45u
*Global Parameters: *Global Parameters:
.PARAM GAIN={0.5} .PARAM GAIN={0.5}
*Models and Subcircuits: *Models and Subcircuits:
* A dual opamp ngspice model * A dual opamp ngspice model
* file name: LM13700-DUAL.ckt * file name: LM13700-DUAL.ckt
.subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+ .subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+
+ 2out 2in- 2in+ 2Dbias 2ABin + 2out 2in- 2in+ 2Dbias 2ABin
*////////////////////////////////////////////////////////////////////// *//////////////////////////////////////////////////////////////////////
* (C) National Semiconductor, Inc. * (C) National Semiconductor, Inc.
* Models developed and under copyright by: * Models developed and under copyright by:
* National Semiconductor, Inc. * National Semiconductor, Inc.
*///////////////////////////////////////////////////////////////////// */////////////////////////////////////////////////////////////////////
* Legal Notice: This material is intended for free software support. * Legal Notice: This material is intended for free software support.
* The file may be copied, and distributed; however, reselling the * The file may be copied, and distributed; however, reselling the
* material is illegal * material is illegal
*//////////////////////////////////////////////////////////////////// *////////////////////////////////////////////////////////////////////
* For ordering or technical information on these models, contact: * For ordering or technical information on these models, contact:
* National Semiconductor's Customer Response Center * National Semiconductor's Customer Response Center
* 7:00 A.M.--7:00 P.M. U.S. Central Time * 7:00 A.M.--7:00 P.M. U.S. Central Time
* (800) 272-9959 * (800) 272-9959
* For Applications support, contact the Internet address: * For Applications support, contact the Internet address:
* amps-apps@galaxy.nsc.com * amps-apps@galaxy.nsc.com
* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ * \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
* LM13700 Dual Operational Transconductance Amplifier * LM13700 Dual Operational Transconductance Amplifier
* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ * \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
* *
* Amplifier Bias Input * Amplifier Bias Input
* | Diode Bias * | Diode Bias
* | | Positive Input * | | Positive Input
* | | | Negative Input * | | | Negative Input
* | | | | Output * | | | | Output
* | | | | | Negative power supply * | | | | | Negative power supply
* | | | | | | Buffer Input * | | | | | | Buffer Input
* | | | | | | | Buffer Output * | | | | | | | Buffer Output
* | | | | | | | | Positive power supply * | | | | | | | | Positive power supply
* | | | | | | | | | * | | | | | | | | |
.SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11 .SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11
* *
* Features: * Features:
* gm adjustable over 6 decades. * gm adjustable over 6 decades.
* Excellent gm linearity. * Excellent gm linearity.
* Linearizing diodes. * Linearizing diodes.
* Wide supply range of +/-2V to +/-22V. * Wide supply range of +/-2V to +/-22V.
* *
* Note: This model is single-pole in nature and over-estimates * Note: This model is single-pole in nature and over-estimates
* AC bandwidth and phase margin (stability) by over 2X. * AC bandwidth and phase margin (stability) by over 2X.
* Although refinement may be possible in the future, please * Although refinement may be possible in the future, please
* use benchtesting to finalize AC circuit design. * use benchtesting to finalize AC circuit design.
* *
* Note: Model is for single device only and simulated * Note: Model is for single device only and simulated
* supply current is 1/2 of total device current. * supply current is 1/2 of total device current.
* *
****************************************************** ******************************************************
* *
C1 6 4 4.8P C1 6 4 4.8P
C2 3 6 4.8P C2 3 6 4.8P
* Output capacitor * Output capacitor
C3 5 6 6.26P C3 5 6 6.26P
D1 2 4 DX D1 2 4 DX
D2 2 3 DX D2 2 3 DX
D3 11 21 DX D3 11 21 DX
D4 21 22 DX D4 21 22 DX
D5 1 26 DX D5 1 26 DX
D6 26 27 DX D6 26 27 DX
D7 5 29 DX D7 5 29 DX
D8 28 5 DX D8 28 5 DX
D10 31 25 DX D10 31 25 DX
* Clamp for -CMR * Clamp for -CMR
D11 28 25 DX D11 28 25 DX
* Ios source * Ios source
F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9 F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9
F2 11 5 V2 1.022 F2 11 5 V2 1.022
F3 25 6 V3 1.0 F3 25 6 V3 1.0
F4 5 6 V1 1.022 F4 5 6 V1 1.022
* Output impedance * Output impedance
F5 5 0 POLY(2) V3 V7 0 0 0 0 1 F5 5 0 POLY(2) V3 V7 0 0 0 0 1
G1 0 33 5 0 .55E-3 G1 0 33 5 0 .55E-3
I1 11 6 300U I1 11 6 300U
Q1 24 32 31 QX1 Q1 24 32 31 QX1
Q2 23 3 31 QX2 Q2 23 3 31 QX2
Q3 11 7 30 QZ Q3 11 7 30 QZ
Q4 11 30 8 QY Q4 11 30 8 QY
V1 22 24 0V V1 22 24 0V
V2 22 23 0V V2 22 23 0V
V3 27 6 0V V3 27 6 0V
V4 11 29 1.4 V4 11 29 1.4
V5 28 6 1.2 V5 28 6 1.2
V6 4 32 0V V6 4 32 0V
V7 33 0 0V V7 33 0 0V
.MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2) .MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2) .MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QY NPN (IS=6E-15 BF=50) .MODEL QY NPN (IS=6E-15 BF=50)
.MODEL QZ NPN (IS=5E-16 BF=266) .MODEL QZ NPN (IS=5E-16 BF=266)
.MODEL DX D (IS=5E-16) .MODEL DX D (IS=5E-16)
.ENDS .ENDS
*$ *$
XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS
XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS
.ends .ends
* *
.MODEL QBC547B NPN( .MODEL QBC547B NPN(
+ IS=2.39E-14 + IS=2.39E-14
+ NF=1.008 + NF=1.008
+ ISE=3.545E-15 + ISE=3.545E-15
+ NE=1.541 + NE=1.541
+ BF=294.3 + BF=294.3
+ IKF=0.1357 + IKF=0.1357
+ VAF=63.2 + VAF=63.2
+ NR=1.004 + NR=1.004
+ ISC=6.272E-14 + ISC=6.272E-14
+ NC=1.243 + NC=1.243
+ BR=7.946 + BR=7.946
+ IKR=0.1144 + IKR=0.1144
+ VAR=25.9 + VAR=25.9
+ RB=1 + RB=1
+ IRB=1E-06 + IRB=1E-06
+ RBM=1 + RBM=1
+ RE=0.4683 + RE=0.4683
+ RC=0.85 + RC=0.85
+ XTB=0 + XTB=0
+ EG=1.11 + EG=1.11
+ XTI=3 + XTI=3
+ CJE=1.358E-11 + CJE=1.358E-11
+ VJE=0.65 + VJE=0.65
+ MJE=0.3279 + MJE=0.3279
+ TF=4.391E-10 + TF=4.391E-10
+ XTF=120 + XTF=120
+ VTF=2.643 + VTF=2.643
+ ITF=0.7495 + ITF=0.7495
+ PTF=0 + PTF=0
+ CJC=3.728E-12 + CJC=3.728E-12
+ VJC=0.3997 + VJC=0.3997
+ MJC=0.2955 + MJC=0.2955
+ XCJC=0.6193 + XCJC=0.6193
+ TR=1E-32 + TR=1E-32
+ CJS=0 + CJS=0
+ VJS=0.75 + VJS=0.75
+ MJS=0.333 + MJS=0.333
+ FC=0.9579 ) + FC=0.9579 )
.END .END

File diff suppressed because one or more lines are too long

View File

@@ -1 +1 @@
Record=TopLevelDocument|FileName=VCA_LM13700.SchDoc|SheetNumber=1 Record=TopLevelDocument|FileName=VCA_LM13700.SchDoc|SheetNumber=1

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

View File

@@ -1,17 +1,17 @@
Change Component Designator: Old Designator=C? New Designator=C1 Change Component Designator: Old Designator=C? New Designator=C1
Change Component Designator: Old Designator=C? New Designator=C2 Change Component Designator: Old Designator=C? New Designator=C2
Change Component Designator: Old Designator=I? New Designator=I1 Change Component Designator: Old Designator=I? New Designator=I1
Change Component Designator: Old Designator=IC? New Designator=IC1 Change Component Designator: Old Designator=IC? New Designator=IC1
Change Component Designator: Old Designator=IC? New Designator=IC1 Change Component Designator: Old Designator=IC? New Designator=IC1
Change Component Designator: Old Designator=IC? New Designator=IC1 Change Component Designator: Old Designator=IC? New Designator=IC1
Change Component Designator: Old Designator=IC? New Designator=IC1 Change Component Designator: Old Designator=IC? New Designator=IC1
Change Component Designator: Old Designator=IC? New Designator=IC1 Change Component Designator: Old Designator=IC? New Designator=IC1
Change Component Designator: Old Designator=R? New Designator=R1 Change Component Designator: Old Designator=R? New Designator=R1
Change Component Designator: Old Designator=R? New Designator=R2 Change Component Designator: Old Designator=R? New Designator=R2
Change Component Designator: Old Designator=R? New Designator=R3 Change Component Designator: Old Designator=R? New Designator=R3
Change Component Designator: Old Designator=R? New Designator=R4 Change Component Designator: Old Designator=R? New Designator=R4
Change Component Designator: Old Designator=R? New Designator=R5 Change Component Designator: Old Designator=R? New Designator=R5
Change Component Designator: Old Designator=R? New Designator=R6 Change Component Designator: Old Designator=R? New Designator=R6
Change Component Designator: Old Designator=R? New Designator=R7 Change Component Designator: Old Designator=R? New Designator=R7
Change Component Designator: Old Designator=R? New Designator=R8 Change Component Designator: Old Designator=R? New Designator=R8
Change Component Designator: Old Designator=R? New Designator=R9 Change Component Designator: Old Designator=R? New Designator=R9

View File

@@ -1 +1 @@
Change Component Designator: Old Designator=R? New Designator=R10 Change Component Designator: Old Designator=R? New Designator=R10

View File

@@ -1,142 +1,142 @@
VCF_LM13700_StateVariable VCF_LM13700_StateVariable
*SPICE Netlist generated by Advanced Sim server on 21.12.2025 11:31:08 *SPICE Netlist generated by Advanced Sim server on 21.12.2025 11:31:08
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
CC1 VCM NetC1_2 1nF CC1 VCM NetC1_2 1nF
CC2 VCM NetC2_2 1nF CC2 VCM NetC2_2 1nF
II_abc VCM NetI_abc_2 0 II_abc VCM NetI_abc_2 0
XIC1A NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC2_2 0 NetC2_2 BP_Out LP_Out XIC1A NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC2_2 0 NetC2_2 BP_Out LP_Out
+ NetC1_2 Vcc NetC1_2 NetIC1_4 NetIC1_3 NetIC1_2 NetI_abc_2 LM13700-DUAL + NetC1_2 Vcc NetC1_2 NetIC1_4 NetIC1_3 NetIC1_2 NetI_abc_2 LM13700-DUAL
XIC1B NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC2_2 0 NetC2_2 BP_Out LP_Out XIC1B NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC2_2 0 NetC2_2 BP_Out LP_Out
+ NetC1_2 Vcc NetC1_2 NetIC1_4 NetIC1_3 NetIC1_2 NetI_abc_2 LM13700-DUAL + NetC1_2 Vcc NetC1_2 NetIC1_4 NetIC1_3 NetIC1_2 NetI_abc_2 LM13700-DUAL
XIC1C NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC2_2 0 NetC2_2 BP_Out LP_Out XIC1C NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC2_2 0 NetC2_2 BP_Out LP_Out
+ NetC1_2 Vcc NetC1_2 NetIC1_4 NetIC1_3 NetIC1_2 NetI_abc_2 LM13700-DUAL + NetC1_2 Vcc NetC1_2 NetIC1_4 NetIC1_3 NetIC1_2 NetI_abc_2 LM13700-DUAL
XIC1D NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC2_2 0 NetC2_2 BP_Out LP_Out XIC1D NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC2_2 0 NetC2_2 BP_Out LP_Out
+ NetC1_2 Vcc NetC1_2 NetIC1_4 NetIC1_3 NetIC1_2 NetI_abc_2 LM13700-DUAL + NetC1_2 Vcc NetC1_2 NetIC1_4 NetIC1_3 NetIC1_2 NetI_abc_2 LM13700-DUAL
XIC1E NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC2_2 0 NetC2_2 BP_Out LP_Out XIC1E NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC2_2 0 NetC2_2 BP_Out LP_Out
+ NetC1_2 Vcc NetC1_2 NetIC1_4 NetIC1_3 NetIC1_2 NetI_abc_2 LM13700-DUAL + NetC1_2 Vcc NetC1_2 NetIC1_4 NetIC1_3 NetIC1_2 NetI_abc_2 LM13700-DUAL
RR1 VCM NetIC1_3 1k RR1 VCM NetIC1_3 1k
RR2 NetIC1_14 Uin 10k RR2 NetIC1_14 Uin 10k
RR3 BP_Out NetIC1_3 20k RR3 BP_Out NetIC1_3 20k
RR4 VCM NetIC1_14 1K RR4 VCM NetIC1_14 1K
RR5 0 LP_Out 5.1k RR5 0 LP_Out 5.1k
RR6 VCM NetIC1_13 1k RR6 VCM NetIC1_13 1k
RR7 0 BP_Out 5.1k RR7 0 BP_Out 5.1k
RR8 BP_Out NetIC1_13 20k RR8 BP_Out NetIC1_13 20k
RR9 LP_Out NetIC1_13 20k RR9 LP_Out NetIC1_13 20k
RR10 VCM NetIC1_4 1k RR10 VCM NetIC1_4 1k
VUe Uin VCM DC 0 SIN(0 3V 440Hz 0 0 0) AC 1 0 VUe Uin VCM DC 0 SIN(0 3V 440Hz 0 0 0) AC 1 0
VUneg VCM 0 +5V VUneg VCM 0 +5V
VUpos Vcc VCM +5V VUpos Vcc VCM +5V
.PLOT AC {dB(v(BP_Out))} =PLOT(1) =AXIS(1) =NAME(BP) =UNITS(dB) .PLOT AC {dB(v(BP_Out))} =PLOT(1) =AXIS(1) =NAME(BP) =UNITS(dB)
.PLOT AC {dB(v(LP_Out))} =PLOT(2) =AXIS(1) =NAME(LP) =UNITS(dB) .PLOT AC {dB(v(LP_Out))} =PLOT(2) =AXIS(1) =NAME(LP) =UNITS(dB)
*Selected Circuit Analyses: *Selected Circuit Analyses:
.AC DEC 10 20 200k .AC DEC 10 20 200k
.CONTROL .CONTROL
SWEEP I_abc LIST 1uA 10uA 100uA 500uA SWEEP I_abc LIST 1uA 10uA 100uA 500uA
.ENDC .ENDC
*Models and Subcircuits: *Models and Subcircuits:
* A dual opamp ngspice model * A dual opamp ngspice model
* file name: LM13700-DUAL.ckt * file name: LM13700-DUAL.ckt
.subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+ .subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+
+ 2out 2in- 2in+ 2Dbias 2ABin + 2out 2in- 2in+ 2Dbias 2ABin
*////////////////////////////////////////////////////////////////////// *//////////////////////////////////////////////////////////////////////
* (C) National Semiconductor, Inc. * (C) National Semiconductor, Inc.
* Models developed and under copyright by: * Models developed and under copyright by:
* National Semiconductor, Inc. * National Semiconductor, Inc.
*///////////////////////////////////////////////////////////////////// */////////////////////////////////////////////////////////////////////
* Legal Notice: This material is intended for free software support. * Legal Notice: This material is intended for free software support.
* The file may be copied, and distributed; however, reselling the * The file may be copied, and distributed; however, reselling the
* material is illegal * material is illegal
*//////////////////////////////////////////////////////////////////// *////////////////////////////////////////////////////////////////////
* For ordering or technical information on these models, contact: * For ordering or technical information on these models, contact:
* National Semiconductor's Customer Response Center * National Semiconductor's Customer Response Center
* 7:00 A.M.--7:00 P.M. U.S. Central Time * 7:00 A.M.--7:00 P.M. U.S. Central Time
* (800) 272-9959 * (800) 272-9959
* For Applications support, contact the Internet address: * For Applications support, contact the Internet address:
* amps-apps@galaxy.nsc.com * amps-apps@galaxy.nsc.com
* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ * \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
* LM13700 Dual Operational Transconductance Amplifier * LM13700 Dual Operational Transconductance Amplifier
* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ * \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
* *
* Amplifier Bias Input * Amplifier Bias Input
* | Diode Bias * | Diode Bias
* | | Positive Input * | | Positive Input
* | | | Negative Input * | | | Negative Input
* | | | | Output * | | | | Output
* | | | | | Negative power supply * | | | | | Negative power supply
* | | | | | | Buffer Input * | | | | | | Buffer Input
* | | | | | | | Buffer Output * | | | | | | | Buffer Output
* | | | | | | | | Positive power supply * | | | | | | | | Positive power supply
* | | | | | | | | | * | | | | | | | | |
.SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11 .SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11
* *
* Features: * Features:
* gm adjustable over 6 decades. * gm adjustable over 6 decades.
* Excellent gm linearity. * Excellent gm linearity.
* Linearizing diodes. * Linearizing diodes.
* Wide supply range of +/-2V to +/-22V. * Wide supply range of +/-2V to +/-22V.
* *
* Note: This model is single-pole in nature and over-estimates * Note: This model is single-pole in nature and over-estimates
* AC bandwidth and phase margin (stability) by over 2X. * AC bandwidth and phase margin (stability) by over 2X.
* Although refinement may be possible in the future, please * Although refinement may be possible in the future, please
* use benchtesting to finalize AC circuit design. * use benchtesting to finalize AC circuit design.
* *
* Note: Model is for single device only and simulated * Note: Model is for single device only and simulated
* supply current is 1/2 of total device current. * supply current is 1/2 of total device current.
* *
****************************************************** ******************************************************
* *
C1 6 4 4.8P C1 6 4 4.8P
C2 3 6 4.8P C2 3 6 4.8P
* Output capacitor * Output capacitor
C3 5 6 6.26P C3 5 6 6.26P
D1 2 4 DX D1 2 4 DX
D2 2 3 DX D2 2 3 DX
D3 11 21 DX D3 11 21 DX
D4 21 22 DX D4 21 22 DX
D5 1 26 DX D5 1 26 DX
D6 26 27 DX D6 26 27 DX
D7 5 29 DX D7 5 29 DX
D8 28 5 DX D8 28 5 DX
D10 31 25 DX D10 31 25 DX
* Clamp for -CMR * Clamp for -CMR
D11 28 25 DX D11 28 25 DX
* Ios source * Ios source
F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9 F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9
F2 11 5 V2 1.022 F2 11 5 V2 1.022
F3 25 6 V3 1.0 F3 25 6 V3 1.0
F4 5 6 V1 1.022 F4 5 6 V1 1.022
* Output impedance * Output impedance
F5 5 0 POLY(2) V3 V7 0 0 0 0 1 F5 5 0 POLY(2) V3 V7 0 0 0 0 1
G1 0 33 5 0 .55E-3 G1 0 33 5 0 .55E-3
I1 11 6 300U I1 11 6 300U
Q1 24 32 31 QX1 Q1 24 32 31 QX1
Q2 23 3 31 QX2 Q2 23 3 31 QX2
Q3 11 7 30 QZ Q3 11 7 30 QZ
Q4 11 30 8 QY Q4 11 30 8 QY
V1 22 24 0V V1 22 24 0V
V2 22 23 0V V2 22 23 0V
V3 27 6 0V V3 27 6 0V
V4 11 29 1.4 V4 11 29 1.4
V5 28 6 1.2 V5 28 6 1.2
V6 4 32 0V V6 4 32 0V
V7 33 0 0V V7 33 0 0V
.MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2) .MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2) .MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QY NPN (IS=6E-15 BF=50) .MODEL QY NPN (IS=6E-15 BF=50)
.MODEL QZ NPN (IS=5E-16 BF=266) .MODEL QZ NPN (IS=5E-16 BF=266)
.MODEL DX D (IS=5E-16) .MODEL DX D (IS=5E-16)
.ENDS .ENDS
*$ *$
XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS
XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS
.ends .ends
.END .END

File diff suppressed because one or more lines are too long

View File

@@ -1 +1 @@
Record=TopLevelDocument|FileName=VCF_LM13700_StateVariable.SchDoc|SheetNumber=1 Record=TopLevelDocument|FileName=VCF_LM13700_StateVariable.SchDoc|SheetNumber=1

File diff suppressed because one or more lines are too long

File diff suppressed because one or more lines are too long

View File

@@ -1,10 +1,10 @@
Change Component Designator: Old Designator=IC? New Designator=IC1 Change Component Designator: Old Designator=IC? New Designator=IC1
Change Component Designator: Old Designator=IC? New Designator=IC1 Change Component Designator: Old Designator=IC? New Designator=IC1
Change Component Designator: Old Designator=IC? New Designator=IC1 Change Component Designator: Old Designator=IC? New Designator=IC1
Change Component Designator: Old Designator=R? New Designator=R2 Change Component Designator: Old Designator=R? New Designator=R2
Change Component Designator: Old Designator=R? New Designator=R3 Change Component Designator: Old Designator=R? New Designator=R3
Change Component Designator: Old Designator=R? New Designator=R4 Change Component Designator: Old Designator=R? New Designator=R4
Change Component Designator: Old Designator=R? New Designator=R5 Change Component Designator: Old Designator=R? New Designator=R5
Change Component Designator: Old Designator=R? New Designator=R6 Change Component Designator: Old Designator=R? New Designator=R6
Change Component Designator: Old Designator=R? New Designator=R7 Change Component Designator: Old Designator=R? New Designator=R7
Change Component Designator: Old Designator=V? New Designator=V1 Change Component Designator: Old Designator=V? New Designator=V1

View File

@@ -1,134 +1,134 @@
VCA_LP_LM13700 VCA_LP_LM13700
*SPICE Netlist generated by Advanced Sim server on 22.09.2025 16:20:16 *SPICE Netlist generated by Advanced Sim server on 22.09.2025 16:20:16
.options MixedSimGenerated .options MixedSimGenerated
*Schematic Netlist: *Schematic Netlist:
CC 0 NetC_2 150pF CC 0 NetC_2 150pF
II_abc 0 NetI_abc_2 1.163uA II_abc 0 NetI_abc_2 1.163uA
XIC1A NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC_2 Vee NetC_2 Ua XIC1A NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC_2 Vee NetC_2 Ua
+ ExtraNet_XIC1A_9 ExtraNet_XIC1A_10 Vcc ExtraNet_XIC1A_12 ExtraNet_XIC1A_13 + ExtraNet_XIC1A_9 ExtraNet_XIC1A_10 Vcc ExtraNet_XIC1A_12 ExtraNet_XIC1A_13
+ ExtraNet_XIC1A_14 ExtraNet_XIC1A_15 ExtraNet_XIC1A_16 LM13700-DUAL + ExtraNet_XIC1A_14 ExtraNet_XIC1A_15 ExtraNet_XIC1A_16 LM13700-DUAL
XIC1C NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC_2 Vee NetC_2 Ua XIC1C NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC_2 Vee NetC_2 Ua
+ ExtraNet_XIC1C_9 ExtraNet_XIC1C_10 Vcc ExtraNet_XIC1C_12 ExtraNet_XIC1C_13 + ExtraNet_XIC1C_9 ExtraNet_XIC1C_10 Vcc ExtraNet_XIC1C_12 ExtraNet_XIC1C_13
+ ExtraNet_XIC1C_14 ExtraNet_XIC1C_15 ExtraNet_XIC1C_16 LM13700-DUAL + ExtraNet_XIC1C_14 ExtraNet_XIC1C_15 ExtraNet_XIC1C_16 LM13700-DUAL
XIC1E NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC_2 Vee NetC_2 Ua XIC1E NetI_abc_2 NetIC1_15 NetIC1_14 NetIC1_13 NetC_2 Vee NetC_2 Ua
+ ExtraNet_XIC1E_9 ExtraNet_XIC1E_10 Vcc ExtraNet_XIC1E_12 ExtraNet_XIC1E_13 + ExtraNet_XIC1E_9 ExtraNet_XIC1E_10 Vcc ExtraNet_XIC1E_12 ExtraNet_XIC1E_13
+ ExtraNet_XIC1E_14 ExtraNet_XIC1E_15 ExtraNet_XIC1E_16 LM13700-DUAL + ExtraNet_XIC1E_14 ExtraNet_XIC1E_15 ExtraNet_XIC1E_16 LM13700-DUAL
RR1 NetR1_1 NetIC1_14 100k RR1 NetR1_1 NetIC1_14 100k
RR4 0 NetIC1_14 200R RR4 0 NetIC1_14 200R
RR5 Ua NetIC1_13 100k RR5 Ua NetIC1_13 100k
RR6 Ua Vee 10k RR6 Ua Vee 10k
RR7 NetIC1_13 0 200R RR7 NetIC1_13 0 200R
VUin NetR1_1 0 DC 0 SIN(0 1 44Hz 0 0 0) AC 1 0 VUin NetR1_1 0 DC 0 SIN(0 1 44Hz 0 0 0) AC 1 0
VUneg 0 Vee +15V VUneg 0 Vee +15V
VUpos Vcc 0 +15V VUpos Vcc 0 +15V
.PLOT AC {dB(v(Ua))} =PLOT(1) =AXIS(1) =NAME(Ua) =UNITS(V) .PLOT AC {dB(v(Ua))} =PLOT(1) =AXIS(1) =NAME(Ua) =UNITS(V)
*Selected Circuit Analyses: *Selected Circuit Analyses:
.AC DEC 10 1 100000 .AC DEC 10 1 100000
.CONTROL .CONTROL
SWEEP I_abc 1u 10u 1u SWEEP I_abc 1u 10u 1u
.ENDC .ENDC
*Models and Subcircuits: *Models and Subcircuits:
* A dual opamp ngspice model * A dual opamp ngspice model
* file name: LM13700-DUAL.ckt * file name: LM13700-DUAL.ckt
.subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+ .subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+
+ 2out 2in- 2in+ 2Dbias 2ABin + 2out 2in- 2in+ 2Dbias 2ABin
*////////////////////////////////////////////////////////////////////// *//////////////////////////////////////////////////////////////////////
* (C) National Semiconductor, Inc. * (C) National Semiconductor, Inc.
* Models developed and under copyright by: * Models developed and under copyright by:
* National Semiconductor, Inc. * National Semiconductor, Inc.
*///////////////////////////////////////////////////////////////////// */////////////////////////////////////////////////////////////////////
* Legal Notice: This material is intended for free software support. * Legal Notice: This material is intended for free software support.
* The file may be copied, and distributed; however, reselling the * The file may be copied, and distributed; however, reselling the
* material is illegal * material is illegal
*//////////////////////////////////////////////////////////////////// *////////////////////////////////////////////////////////////////////
* For ordering or technical information on these models, contact: * For ordering or technical information on these models, contact:
* National Semiconductor's Customer Response Center * National Semiconductor's Customer Response Center
* 7:00 A.M.--7:00 P.M. U.S. Central Time * 7:00 A.M.--7:00 P.M. U.S. Central Time
* (800) 272-9959 * (800) 272-9959
* For Applications support, contact the Internet address: * For Applications support, contact the Internet address:
* amps-apps@galaxy.nsc.com * amps-apps@galaxy.nsc.com
* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ * \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
* LM13700 Dual Operational Transconductance Amplifier * LM13700 Dual Operational Transconductance Amplifier
* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ * \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
* *
* Amplifier Bias Input * Amplifier Bias Input
* | Diode Bias * | Diode Bias
* | | Positive Input * | | Positive Input
* | | | Negative Input * | | | Negative Input
* | | | | Output * | | | | Output
* | | | | | Negative power supply * | | | | | Negative power supply
* | | | | | | Buffer Input * | | | | | | Buffer Input
* | | | | | | | Buffer Output * | | | | | | | Buffer Output
* | | | | | | | | Positive power supply * | | | | | | | | Positive power supply
* | | | | | | | | | * | | | | | | | | |
.SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11 .SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11
* *
* Features: * Features:
* gm adjustable over 6 decades. * gm adjustable over 6 decades.
* Excellent gm linearity. * Excellent gm linearity.
* Linearizing diodes. * Linearizing diodes.
* Wide supply range of +/-2V to +/-22V. * Wide supply range of +/-2V to +/-22V.
* *
* Note: This model is single-pole in nature and over-estimates * Note: This model is single-pole in nature and over-estimates
* AC bandwidth and phase margin (stability) by over 2X. * AC bandwidth and phase margin (stability) by over 2X.
* Although refinement may be possible in the future, please * Although refinement may be possible in the future, please
* use benchtesting to finalize AC circuit design. * use benchtesting to finalize AC circuit design.
* *
* Note: Model is for single device only and simulated * Note: Model is for single device only and simulated
* supply current is 1/2 of total device current. * supply current is 1/2 of total device current.
* *
****************************************************** ******************************************************
* *
C1 6 4 4.8P C1 6 4 4.8P
C2 3 6 4.8P C2 3 6 4.8P
* Output capacitor * Output capacitor
C3 5 6 6.26P C3 5 6 6.26P
D1 2 4 DX D1 2 4 DX
D2 2 3 DX D2 2 3 DX
D3 11 21 DX D3 11 21 DX
D4 21 22 DX D4 21 22 DX
D5 1 26 DX D5 1 26 DX
D6 26 27 DX D6 26 27 DX
D7 5 29 DX D7 5 29 DX
D8 28 5 DX D8 28 5 DX
D10 31 25 DX D10 31 25 DX
* Clamp for -CMR * Clamp for -CMR
D11 28 25 DX D11 28 25 DX
* Ios source * Ios source
F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9 F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9
F2 11 5 V2 1.022 F2 11 5 V2 1.022
F3 25 6 V3 1.0 F3 25 6 V3 1.0
F4 5 6 V1 1.022 F4 5 6 V1 1.022
* Output impedance * Output impedance
F5 5 0 POLY(2) V3 V7 0 0 0 0 1 F5 5 0 POLY(2) V3 V7 0 0 0 0 1
G1 0 33 5 0 .55E-3 G1 0 33 5 0 .55E-3
I1 11 6 300U I1 11 6 300U
Q1 24 32 31 QX1 Q1 24 32 31 QX1
Q2 23 3 31 QX2 Q2 23 3 31 QX2
Q3 11 7 30 QZ Q3 11 7 30 QZ
Q4 11 30 8 QY Q4 11 30 8 QY
V1 22 24 0V V1 22 24 0V
V2 22 23 0V V2 22 23 0V
V3 27 6 0V V3 27 6 0V
V4 11 29 1.4 V4 11 29 1.4
V5 28 6 1.2 V5 28 6 1.2
V6 4 32 0V V6 4 32 0V
V7 33 0 0V V7 33 0 0V
.MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2) .MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2) .MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QY NPN (IS=6E-15 BF=50) .MODEL QY NPN (IS=6E-15 BF=50)
.MODEL QZ NPN (IS=5E-16 BF=266) .MODEL QZ NPN (IS=5E-16 BF=266)
.MODEL DX D (IS=5E-16) .MODEL DX D (IS=5E-16)
.ENDS .ENDS
*$ *$
XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS
XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS
.ends .ends
.END .END

File diff suppressed because one or more lines are too long

Some files were not shown because too many files have changed in this diff Show More