PCB WIP 2

All routing done, ready for review regarding the schematics, still have to do some silk screens...
This commit is contained in:
2025-12-27 01:02:47 +01:00
parent 3ec229c965
commit c661422a10
192 changed files with 54752 additions and 54 deletions

View File

@@ -0,0 +1,20 @@
%TF.GenerationSoftware,Altium Limited,Altium Designer,24.8.2 (39)*%
G04 Layer_Color=0*
%FSLAX45Y45*%
%MOMM*%
%TF.SameCoordinates,7B02E6E7-76C9-4046-B631-68F2DAB786CE*%
%TF.FilePolarity,Positive*%
%TF.FileFunction,Profile,NP*%
%TF.Part,Single*%
G01*
G75*
%TA.AperFunction,Profile*%
%ADD159C,0.02540*%
D159*
X0Y0D02*
Y8400000D01*
X12500004D01*
Y0D01*
X0D01*
%TF.MD5,253eb76b27a9d2007d420a1874e78045*%
M02*