mirror of
https://github.com/erik-toth/audio-synth.git
synced 2026-01-25 15:37:33 +00:00
Added Octave +2 Shift, Changed Designators for 8-Shift, Normalized Restistance Values for PWM, Small changes changes uC-Compensation
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@@ -1,5 +1,5 @@
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TRI-SQR-VCO_OTA_SS
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TRI-SQR-VCO_OTA_SS
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*SPICE Netlist generated by Advanced Sim server on 11.12.2025 15:00:04
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*SPICE Netlist generated by Advanced Sim server on 12.12.2025 14:46:42
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.options MixedSimGenerated
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.options MixedSimGenerated
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*Schematic Netlist:
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*Schematic Netlist:
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@@ -23,7 +23,7 @@ XIC3C VCM NetIC3_9 VAP 0 U_C TL074
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XIC3D VCM NetIC3_13 VAP 0 U_CV TL074
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XIC3D VCM NetIC3_13 VAP 0 U_CV TL074
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XIC4A R.VMID NetIC4_1 VAP 0 NetIC4_1 TL074
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XIC4A R.VMID NetIC4_1 VAP 0 NetIC4_1 TL074
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RPTC NetPTC_1 U_C 1k
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RPTC NetPTC_1 U_C 1k
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RR2 0 U_TRI 22k
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RR2 0 U_TRI 20k
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RR3 VAP NetIC1_1 15k
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RR3 VAP NetIC1_1 15k
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RR4a NetIC3_2 U_TRI 200k
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RR4a NetIC3_2 U_TRI 200k
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RR4b U_in NetIC3_2 100k
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RR4b U_in NetIC3_2 100k
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@@ -38,13 +38,24 @@ RR_inv_b NetIC3_13 U_CV 10k
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RR_lambda_T_a NetIC3_9 NetR_lambda_T_a_2 1.2k
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RR_lambda_T_a NetIC3_9 NetR_lambda_T_a_2 1.2k
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RR_lambda_T_b NetR_lambda_T_a_2 NetPTC_1 100R
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RR_lambda_T_b NetR_lambda_T_a_2 NetPTC_1 100R
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RR_off_b NetIC2_9 NetIC2_8 10k
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RR_off_b NetIC2_9 NetIC2_8 10k
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RR_off_c_+0 VAP NetR_off_c_+0_2 10k
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RR_off_c_+1A VAP NetR_off_c_+1_2 {8330R * 0.5}
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RR_off_c_+1B NetR_off_c_+1_2 NetR_off_c_+1_2 {8330R - (8330R * 0.5)}
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RR_off_c_+1_vor VAP NetR_off_c_+1_vor_2 10k
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RR_off_c_+2A VAP NetR_off_c_+2_2 {7150R * 0.5}
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RR_off_c_+2B NetR_off_c_+2_2 NetR_off_c_+2_2 {7150R - (7150R * 0.5)}
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RR_off_c_-1A NetR_off_c_+1_vor_2 NetR_off_c_-1_2 {2.5k * 0.5}
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RR_off_c_-1B NetR_off_c_-1_2 NetR_off_c_-1_2 {2.5k - (2.5k * 0.5)}
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RR_off_c_sim VAP NetIC2_9 10k
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RR_off_c_sim VAP NetIC2_9 10k
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RR_off_d NetR_off_d_1 NetIC2_9 10k
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RR_off_d NetR_off_d_1 NetIC2_9 10k
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RR_POT_refA 0 NetR_POT_ref_2 {100k * 0.5}
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RR_POT_refA 0 NetR_POT_ref_2 {100k * 0.5}
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RR_POT_refB NetR_POT_ref_2 NetR_POT_ref_2 {100k - (100k * 0.5)}
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RR_POT_refB NetR_POT_ref_2 NetR_POT_ref_2 {100k - (100k * 0.5)}
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RR_POT_uC_compA NetR_POT_uC_comp_1 NetIC3_9 {1k * 0.5}
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RR_POT_SAWA 0 0 {10k * 0.5}
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RR_POT_uC_compB NetIC3_9 NetR_POT_uC_comp_3 {1k - (1k * 0.5)}
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RR_POT_SAWB 0 NetR_POT_SAW_3 {10k - (10k * 0.5)}
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RR_PWM_a 0 NetIC3_6 15k
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RR_POT_uC_compA 0 NetR_POT_uC_comp_2 {100k * {Q}}
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RR_POT_uC_compB NetR_POT_uC_comp_2 VAP {100k - (100k * {Q})}
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RR_PWM_a1 NetR_POT_SAW_3 NetIC3_6 10k
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RR_PWM_a2 NetR_POT_SAW_3 NetIC3_6 10k
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RR_PWM_b NetIC3_6 VAP 10k
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RR_PWM_b NetIC3_6 VAP 10k
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RR_PWM_c U_PWM NetIC3_7 10k
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RR_PWM_c U_PWM NetIC3_7 10k
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RR_PWM_d VCM U_PWM 20k
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RR_PWM_d VCM U_PWM 20k
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@@ -56,8 +67,7 @@ RR_SAW_b NetIC2_12 U_in 10k
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RR_SAW_c U_SAW NetIC2_13 10k
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RR_SAW_c U_SAW NetIC2_13 10k
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RR_SAW_e U_SQR fet_gate 33k
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RR_SAW_e U_SQR fet_gate 33k
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RR_SAW_f 0 fet_gate 100k
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RR_SAW_f 0 fet_gate 100k
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RR_uC_comp_GND 0 NetR_POT_uC_comp_1 330k
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RR_uC_comp NetIC3_9 NetR_POT_uC_comp_2 1Meg
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RR_uC_comp_VAP NetR_POT_uC_comp_3 VAP 330k
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RRoff_a NetIC3_2 0 1Meg
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RRoff_a NetIC3_2 0 1Meg
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RRoff_b NetIC3_2 0 1Meg
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RRoff_b NetIC3_2 0 1Meg
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XT1 VCM NetC_an_2 NetC_an_1 U_C NetC_an_2 NetT1_6 DMMT3906W
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XT1 VCM NetC_an_2 NetC_an_1 U_C NetC_an_2 NetT1_6 DMMT3906W
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@@ -74,14 +84,20 @@ VU_var NetR_off_d_1 0 1
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.PLOT TRAN {v(U_PWM)} =PLOT(4) =AXIS(1) =NAME(U_PWM) =UNITS(V)
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.PLOT TRAN {v(U_PWM)} =PLOT(4) =AXIS(1) =NAME(U_PWM) =UNITS(V)
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.PLOT TRAN {i(U_MESSITOGND)} =PLOT(5) =AXIS(1) =NAME(I_GND) =UNITS(A)
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.PLOT TRAN {i(U_MESSITOGND)} =PLOT(5) =AXIS(1) =NAME(I_GND) =UNITS(A)
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.PLOT TRAN {p(U_single)} =PLOT(6) =AXIS(1) =NAME(P_Supply) =UNITS(W)
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.PLOT TRAN {p(U_single)} =PLOT(6) =AXIS(1) =NAME(P_Supply) =UNITS(W)
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.PLOT TRAN {i(U_mess)} =PLOT(7) =AXIS(1) =NAME(I_ABC) =UNITS(A)
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.PLOT TRAN {v(U_C)} =PLOT(8) =AXIS(1) =NAME(U_C) =UNITS(V)
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.PLOT TRAN {v(U_CV)} =PLOT(9) =AXIS(1)
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.OPTIONS ABSTOL=1e-10 RELTOL=1e-2 VNTOL=1e-4 METHOD=GEAR MAXORD=2
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.OPTIONS ABSTOL=1e-10 RELTOL=1e-2 VNTOL=1e-4 METHOD=GEAR MAXORD=2
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*Selected Circuit Analyses:
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*Selected Circuit Analyses:
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.TRAN 25u 20m 5m 25u
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.TRAN 25u 20m 5m 25u
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.CONTROL
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.CONTROL
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SWEEP U_var LIST 1
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SWEEP U_var LIST 0 1 2
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.ENDC
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.ENDC
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*Global Parameters:
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.PARAM Q=0.5
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*Models and Subcircuits:
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*Models and Subcircuits:
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* A dual opamp ngspice model
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* A dual opamp ngspice model
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* file name: LM13700-DUAL.ckt
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* file name: LM13700-DUAL.ckt
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