Firmware MCU: Sequencer, erfassen und widergabe im Sequencerblock von beiden Channel, playback im single und loop modus, test OK

dev/analog/ETOTH-TRI-SQR-VCO_OTA_SS/Project Outputs for TRI-SQR-VCO_OTA_SS/Status Report.Txt

@@ -7,4 +7,4 @@ From  : Project [TRI-SQR-VCO_OTA_SS.PrjPcb]
 Files Generated   : 1
 Documents Printed : 0
 
-Finished Output Generation At 21:27:47 On 23.10.2025
+Finished Output Generation At 12:23:27 On 28.11.2025

dev/analog/ETOTH-TRI-SQR-VCO_OTA_SS/Project Outputs for TRI-SQR-VCO_OTA_SS/TRI-SQR-VCO_OTA_SS.nsx

@@ -1,5 +1,5 @@
 TRI-SQR-VCO_OTA_SS
-*SPICE Netlist generated by Advanced Sim server on 18.11.2025 14:07:43
+*SPICE Netlist generated by Advanced Sim server on 28.11.2025 12:29:53
 .options MixedSimGenerated
 
 *Schematic Netlist:
@@ -29,6 +29,8 @@ RR_A 0 U_SQR_OTA 3.63k
 RR_CV NetR_CV_1 NetIC2_9 59.941k
 RR_E NetC_an_2 NetR_E_2 10k
 RR_lambda_T NetIC2_9 U_C 1.1k
+RR_offset_1 NetR_CV_1 GND 10k
+RR_offset_2 VAP NetR_CV_1 10k
 RR_PWM_a GND NetIC3_6 15k
 RR_PWM_b NetIC3_6 VAP 10k
 RR_PWM_c U_PWM NetIC3_7 1k
@@ -55,15 +57,17 @@ VU_var NetR_CV_1 0 1
 .PLOT TRAN {v(U_TRI)} =PLOT(2) =AXIS(1) =NAME(U_TRI) =UNITS(V)
 .PLOT TRAN {v(U_SAW)} =PLOT(3) =AXIS(1) =NAME(U_SAW) =UNITS(V)
 .PLOT TRAN {v(U_PWM)} =PLOT(4) =AXIS(1) =NAME(U_PWM) =UNITS(V)
-.PLOT TRAN {i(U_mess)} =PLOT(5) =AXIS(1) =NAME(I_GND) =UNITS(A)
-.PLOT TRAN {v(U_in)} =PLOT(2) =AXIS(1) =NAME(U_in) =UNITS(V)
+.PLOT TRAN {v(U_C)} =PLOT(5) =AXIS(1) =NAME(U_C) =UNITS(V)
 
 .OPTIONS ABSTOL=1e-10 RELTOL=1e-2 VNTOL=1e-4 METHOD=GEAR MAXORD=2
 *Selected Circuit Analyses:
 .TRAN 25u 20m 5m 25u UIC
+.CONTROL
+SWEEP R_offset_2 LIST 10k 20k 30k
+.ENDC
 
 *Global Parameters:
-.PARAM POS=0
+.PARAM POS={0}
 
 *Models and Subcircuits:
 * A dual opamp ngspice model