Main schematic progress; checked VCA -> Voice Mixer compatibilty; DA Lib Update to V3.2

VCA-Voice Mixer checked if there might be a problem because of the offset, checked out to be ok after some minor fixes

dev/analog/ETOTH-VOICE_MIXER/VOICE-MIXER/Project Outputs for VOICE-MIXER/Status Report.Txt

@@ -7,4 +7,4 @@ From  : Project [VOICE-MIXER.PrjPcb]
 Files Generated   : 1
 Documents Printed : 0
 
-Finished Output Generation At 14:35:22 On 10.09.2025
+Finished Output Generation At 17:19:12 On 13.12.2025

dev/analog/ETOTH-VOICE_MIXER/VOICE-MIXER/Project Outputs for VOICE-MIXER/VOICE-MIXER.nsx

@@ -1,16 +1,17 @@
 VOICE-MIXER
-*SPICE Netlist generated by Advanced Sim server on 10.09.2025 14:45:45
+*SPICE Netlist generated by Advanced Sim server on 14.12.2025 16:19:21
 .options MixedSimGenerated
 
 *Schematic Netlist:
-XIC1A 0 NetIC1_2 VCC VEE U_out TL074
-RR1 U_1 NetIC1_2 10k
-RR2 U_2 NetIC1_2 10k
-RR_K NetIC1_2 U_out 10k
-VU_neg 0 VEE 12
-VU_pos VCC 0 12
-VU_sin1 U_1 0 DC 0 SIN(0 1 440 0 0 0) AC 1 0
-VU_sin2 U_2 0 DC 0 SIN(0 1 880 0 0 0) AC 1 0
+XIC1A VCM NetIC1_2 VAP 0 U_out TL074
+RR1 U_1 NetIC1_2 330k
+RR2 U_2 NetIC1_2 330k
+RR3 VAP NetIC1_2 620k
+RR_K NetIC1_2 U_out 150k
+VU_neg VCM 0 5
+VU_pos VAP VCM 5
+VU_sin1 U_1 VCM DC 0 SIN(-1.3 2 440 0 0 0) AC 1 0
+VU_sin2 U_2 VCM DC 0 SIN(-1.3 2 440 0 0 0) AC 1 0
 
 .PLOT TRAN {v(U_out)} =PLOT(1) =AXIS(1) =NAME(U_out) =UNITS(V)
 .PLOT TRAN {v(U_1)} =PLOT(1) =AXIS(1) =NAME(U_1) =UNITS(V)

dev/analog/VCA_LM13700/Project Outputs for VCA_LM13700/Status Report.Txt

@@ -7,4 +7,4 @@ From  : Project [VCA_LM13700.PrjPcb]
 Files Generated   : 1
 Documents Printed : 0
 
-Finished Output Generation At 13:14:07 On 06.12.2025
+Finished Output Generation At 13:07:34 On 14.12.2025

dev/analog/VCA_LM13700/Project Outputs for VCA_LM13700/VCA_LM13700.nsx

@@ -1,5 +1,5 @@
 VCA_LM13700
-*SPICE Netlist generated by Advanced Sim server on 06.12.2025 16:21:09
+*SPICE Netlist generated by Advanced Sim server on 14.12.2025 13:07:43
 .options MixedSimGenerated
 
 *Schematic Netlist:
@@ -12,17 +12,15 @@ XIC1C NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 OUT 0 OUT Uout ExtraNet_XIC1C_9
 XIC1E NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 OUT 0 OUT Uout ExtraNet_XIC1E_9
 + ExtraNet_XIC1E_10 VAP ExtraNet_XIC1E_12 ExtraNet_XIC1E_13 ExtraNet_XIC1E_14
 + ExtraNet_XIC1E_15 ExtraNet_XIC1E_16 LM13700-DUAL
-RR1 NetIC1_14 IN 3k
+RR1 NetIC1_14 IN 3.3k
 RR2 OUT VCM 27k
 RR3 Uout 0 5.1k
-RR4 VCM NetIC1_14 1k
-RR5 VCM NetIC1_13 1k
+RR4 VCM NetIC1_14 1.2k
+RR5 VCM NetIC1_13 1.2k
 RR_B NetR_B_1 NetR_B_2 100k
 RR_BASE_GAIN NetIC1_16 NetR_BASE_GAIN_2 10k
-RR_D VAP NetIC1_15 5k
-RR_GAINA NetR_BASE_GAIN_2 NetR_BASE_GAIN_2 {100k * {GAIN}}
-RR_GAINB NetR_BASE_GAIN_2 NetR_GAIN_3 {100k - (100k * {GAIN})}
-QT VAP NetR_B_1 NetR_GAIN_3 QBC547B
+RR_D VAP NetIC1_15 5.1k
+QT VAP NetR_B_1 NetR_BASE_GAIN_2 QBC547B
 VU_VCO_EN NetR_B_2 0 DC 0 PULSE(3.3 0 0 4u 1u 20m 40m) AC 1 0
 VUin IN VCM DC 0 SIN(0 2V 440Hz 0 0 0) AC 1 0
 VUneg VCM 0 +5V
@@ -35,13 +33,11 @@ VUpos VAP VCM +5V
 .PLOT TRAN {ib(T)} =PLOT(5) =AXIS(1) =NAME(I_B) =UNITS(A)
 .PLOT TRAN {i(R5)} =PLOT(6) =AXIS(1) =NAME(I_5) =UNITS(A)
 .PLOT TRAN {i(R4)} =PLOT(6) =AXIS(1) =NAME(I_4) =UNITS(A)
+.PLOT TRAN {2*(v(Uout)*0.663)} =PLOT(2) =AXIS(1) =NAME(Uout_buffer) =UNITS(V)
 
 .OPTIONS METHOD=GEAR MAXORD=2
 *Selected Circuit Analyses:
 .TRAN 45u 100m 20m 45u
-.CONTROL
-SWEEP GAIN 0 1 0.1
-.ENDC
 
 *Global Parameters:
 .PARAM GAIN={0.5}

dev/general/MainSys/MainSys.PrjPcb

@@ -118,6 +118,23 @@ GenerateClassCluster=0
 DocumentUniqueId=BEYQFIFN
 
 [Document5]
+DocumentPath=VCA.SchDoc
+AnnotationEnabled=1
+AnnotateStartValue=1
+AnnotationIndexControlEnabled=0
+AnnotateSuffix=
+AnnotateScope=All
+AnnotateOrder=9
+DoLibraryUpdate=1
+DoDatabaseUpdate=1
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=0
+ClassGenNCAutoScope=None
+DItemRevisionGUID=
+GenerateClassCluster=0
+DocumentUniqueId=XBLVBJBP
+
+[Document6]
 DocumentPath=OS.SchDoc
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -134,7 +151,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=CCPVSXXN
 
-[Document6]
+[Document7]
 DocumentPath=MCU.Harness
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -151,7 +168,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=
 
-[Document7]
+[Document8]
 DocumentPath=CV_GEN.SchDoc
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -168,7 +185,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=JHVQNMDK
 
-[Document8]
+[Document9]
 DocumentPath=EXT.SchDoc
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -185,7 +202,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=UTXWPBHR
 
-[Document9]
+[Document10]
 DocumentPath=VCO.SchDoc
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -202,7 +219,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=QDCKIIDO
 
-[Document10]
+[Document11]
 DocumentPath=VCF.SchDoc
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -219,23 +236,6 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=EDYDEOMD
 
-[Document11]
-DocumentPath=VCA.SchDoc
-AnnotationEnabled=1
-AnnotateStartValue=1
-AnnotationIndexControlEnabled=0
-AnnotateSuffix=
-AnnotateScope=All
-AnnotateOrder=9
-DoLibraryUpdate=1
-DoDatabaseUpdate=1
-ClassGenCCAutoEnabled=1
-ClassGenCCAutoRoomEnabled=0
-ClassGenNCAutoScope=None
-DItemRevisionGUID=
-GenerateClassCluster=0
-DocumentUniqueId=XBLVBJBP
-
 [Document12]
 DocumentPath=VCF.Harness
 AnnotationEnabled=1
@@ -254,23 +254,6 @@ GenerateClassCluster=0
 DocumentUniqueId=
 
 [Document13]
-DocumentPath=VCA.Harness
-AnnotationEnabled=1
-AnnotateStartValue=1
-AnnotationIndexControlEnabled=0
-AnnotateSuffix=
-AnnotateScope=All
-AnnotateOrder=-1
-DoLibraryUpdate=1
-DoDatabaseUpdate=1
-ClassGenCCAutoEnabled=1
-ClassGenCCAutoRoomEnabled=0
-ClassGenNCAutoScope=None
-DItemRevisionGUID=
-GenerateClassCluster=0
-DocumentUniqueId=
-
-[Document14]
 DocumentPath=VCO.Harness
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -287,7 +270,7 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=
 
-[Document15]
+[Document14]
 DocumentPath=EXT.Harness
 AnnotationEnabled=1
 AnnotateStartValue=1
@@ -304,6 +287,23 @@ DItemRevisionGUID=
 GenerateClassCluster=0
 DocumentUniqueId=
 
+[Document15]
+DocumentPath=OS.Harness
+AnnotationEnabled=1
+AnnotateStartValue=1
+AnnotationIndexControlEnabled=0
+AnnotateSuffix=
+AnnotateScope=All
+AnnotateOrder=-1
+DoLibraryUpdate=1
+DoDatabaseUpdate=1
+ClassGenCCAutoEnabled=1
+ClassGenCCAutoRoomEnabled=0
+ClassGenNCAutoScope=None
+DItemRevisionGUID=
+GenerateClassCluster=0
+DocumentUniqueId=
+
 [Parameter1]
 Name=ProjectTitle
 Value=Audio synth

dev/general/MainSys/OS.Harness

@@ -0,0 +1 @@
+VOLUME=POT_VOL_1,POT_VOL_2

dev/general/MainSys/VCA.Harness

@@ -1 +0,0 @@
-GAIN=

docs/README.md

@@ -33,6 +33,7 @@ Die eigentliche __Diplomarbeit__ und die dazugehörigen (finalen) Fertigungsunte
 │   ├── <a href="../lab/ExpAmp/">ExpAmp</a><br>
 │   ├── <a href="../lab/OutputStage/">OutputStage</a><br>
 │   ├── <a href="../lab/Sys/">Sys</a><br>
+│   ├── <a href="../lab/VCA/">VCA</a><br>
 │   ├── <a href="../lab/VCF/">VCF</a><br>
 │   └── <a href="../lab/VCO/">VCO</a><br>
 └── <a href="../lit/">lit</a><br>
@@ -80,3 +81,4 @@ Die eigentliche __Diplomarbeit__ und die dazugehörigen (finalen) Fertigungsunte
 - V2.6 (2025-11-25, etoth): IC LM386 (PCB, 3D, Sim)
 - V3.0 (2025-12-03, etoth): Library refactor
 - V3.1 (2025-12-08, etoth): Diverse R, C und T hinzugefügt, sonstige Bauteil normalisiert
+- V3.2 (2025-12-14, etoth): Weitere benötigte R, C hinzugefügt; Matched-Pair hinzugefügt