ETOTH-Amp_LM386 *SPICE Netlist generated by Advanced Sim server on 18.11.2025 21:38:20 .options MixedSimGenerated *Schematic Netlist: CC1 NetC1_1 NetC1_2 50nF CC_VCM1 NetC_VCM1_1 GND 47uF CC_VCM2 VAP NetC_VCM1_1 47uF CCblock NetC1_2 NetCblock_2 2000uF CCblock1 NetCblock1_1 NetCblock1_2 2000uF XIC1C NetIC1_10 NetC_VCM1_1 VAP GND NetIC1_8 TL074 XIC2 NetIC2_1 GND NetCblock1_2 GND NetC1_2 VAP NetIC2_7 NetIC2_8 LM386 RR1 NetC1_1 GND 10R RR_POTA 0 NetCblock1_1 {10k * {POS}} RR_POTB NetCblock1_1 NetR_POT_3 {10k - (10k * {POS})} RR_rs1 NetIC1_10 VAP 470k RR_rs2 GND NetIC1_10 470k RR_Speaker GND NetCblock_2 8R QT_rsN GND NetIC1_8 NetC_VCM1_1 2N2907 QT_rsP VAP NetIC1_8 NetC_VCM1_1 2N2222 VU_q VAP GND 10V VU_VCM_CURRENT 0 NetC_VCM1_1 0 VUin NetR_POT_3 0 DC 0 SIN(0 2 440Hz 0 0 0) AC 1 0 .PLOT TRAN {v(R_Speaker)} =PLOT(1) =AXIS(1) =NAME(U_speaker) =UNITS(V) =RGB(0, 255, 0) .PLOT TRAN {i(R_Speaker)} =PLOT(2) =AXIS(1) =NAME(I_speaker) =UNITS(A) .PLOT TRAN {p(R_Speaker)} =PLOT(3) =AXIS(1) =NAME(P_speaker) =UNITS(W) .PLOT TRAN {i(U_VCM_CURRENT)} =PLOT(4) =AXIS(1) =NAME(I_VCM) =UNITS(A) .PLOT TRAN {v(VAP)} =PLOT(1) =AXIS(1) =RGB(255, 0, 0) .PLOT TRAN {v(GND)} =PLOT(1) =AXIS(1) =RGB(0, 0, 255) .PLOT TRAN {i(Cblock1)} =PLOT(5) =AXIS(1) =NAME(I_C_in) =UNITS(A) .PLOT TRAN {v(Cblock1)} =PLOT(5) =AXIS(2) =NAME(U_C_in) =UNITS(V) .PLOT TRAN {i(Cblock1)} =PLOT(5) =AXIS(1) =NAME(I_C_out) =UNITS(A) .PLOT TRAN {v(Cblock1)} =PLOT(5) =AXIS(2) =NAME(U_C_out) =UNITS(V) .OPTIONS METHOD=GEAR MAXORD=2 *Selected Circuit Analyses: .TRAN 45.45u 22.73m 0 45.45u .CONTROL .ENDC *Global Parameters: .PARAM POS={0.06} *Models and Subcircuits: *TL074 *Quad LoNoise JFETInput OpAmp pkg:DIP14 *+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14) * Connections: * Non-Inverting Input * | Inverting Input * | | Positive Power Supply * | | | Negative Power Supply * | | | | Output * | | | | | .SUBCKT TL074 1 2 3 4 5 C1 11 12 3.498E-12 C2 6 7 15E-12 DC 5 53 DX DE 54 5 DX DLP 90 91 DX DLN 92 90 DX DP 4 3 DX BGND 99 0 V=V(3)*.5 + V(4)*.5 BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 + + I(VLP)*5E6 - I(VLN)*5E6 GA 6 0 11 12 282.8E-6 GCM 0 6 10 99 8.942E-9 ISS 3 10 DC 195E-6 HLIM 90 0 VLIM 1K J1 11 2 10 JX J2 12 1 10 JX R2 6 9 100E3 RD1 4 11 3.536E3 RD2 4 12 3.536E3 RO1 8 5 150 RO2 7 99 150 RP 3 4 2.143E3 RSS 10 99 1.026E6 VB 9 0 DC 0 VC 3 53 DC 2.2 VE 54 4 DC 2.2 VLIM 7 8 DC 0 VLP 91 0 DC 25 VLN 0 92 DC 25 .MODEL DX D(IS=800E-18) .MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1) .ENDS TL074 *TopSPICE library: Models\MISCSEMI.MDB *PART NUMBER: LM386 *MODEL NAME: LM386 *SYMBOL: X8PIN * *LM386 Audio power amplifier * /* * 1. The following model behavior shows good agreement with the * LM386 data sheet values: * * a) Quiescent power supply current; * b) High frequency response at low gain setting; * c) Power-supply rejection ratio, both bypassed and unbypassed; * d) Voltage gain, both with pins 1&8 shorted and open; and * e) Total harmonic distortion. * * 2. The model has the following discrepancies: * * f) High-gain frequency response looks somewhat more wideband * than the actual device; * g) Peak-to-peak output voltage swing is a bit more than the * data sheet value- in other words, the model drives * closer to the rails; and * h) Input bias current in this model is only about 7 nA, * compared with the 250 nA "typical" value mentioned in * the data sheet. * * 3. The frequency response characteristics of this LM386 model * can be adjusted somewhat by changing C1, the rolloff capacitor in * the voltage gain stage. It could also be made more realistic by * tweaking transistor model parameters Cjc, Cje, Tr and Tf, * although this can get pretty hairy. * * 4. Likewise, output drive capability could be made more * realistic by tweaking transistor model parameters; again, this is * hairy. */ * .subckt lm386 g1 inn inp gnd out vs byp g8 * | | | | | | | | * IC pins: 1 2 3 4 5 6 7 8 * input emitter-follower buffers: q1 gnd inn 10011 ddpnp r1 inn gnd 50k q2 gnd inp 10012 ddpnp r2 inp gnd 50k * differential input stage, gain-setting * resistors, and internal feedback resistor: q3 10013 10011 10008 ddpnp q4 10014 10012 g1 ddpnp r3 vs byp 15k r4 byp 10008 15k r5 10008 g8 150 r6 g8 g1 1.35k r7 g1 out 15k * input stage current mirror: q5 10013 10013 gnd ddnpn q6 10014 10013 gnd ddnpn * voltage gain stage & rolloff cap: q7 10017 10014 gnd ddnpn c1 10014 10017 15pf * current mirror source for gain stage: i1 10002 vs dc 5m q8 10004 10002 vs ddpnp q9 10002 10002 vs ddpnp * Sziklai-connected push-pull output stage: q10 10018 10017 out ddpnp q11 10004 10004 10009 ddnpn 100 q12 10009 10009 10017 ddnpn 100 q13 vs 10004 out ddnpn 100 q14 out 10018 gnd ddnpn 100 * generic transistor models generated * with MicroSim's PARTs utility, using * default parameters except Bf: .model ddnpn NPN(Is=10f Xti=3 Eg=1.11 Vaf=100 + Bf=400 Ise=0 Ne=1.5 Ikf=0 Nk=.5 Xtb=1.5 Var=100 + Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=2p Mjc=.3333 + Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n + Tf=1n Itf=1 Xtf=0 Vtf=10) .model ddpnp PNP(Is=10f Xti=3 Eg=1.11 Vaf=100 + Bf=200 Ise=0 Ne=1.5 Ikf=0 Nk=.5 Xtb=1.5 Var=100 + Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=2p Mjc=.3333 + Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n + Tf=1n Itf=1 Xtf=0 Vtf=10) .ends LM386 *2N2907 MCE 5-27-97 *Ref: Motorola Small-Signal Device databook, Q4/94 *Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1 .MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2 + BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5 + CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N) *2N2222 MCE 5-20-97 *Ref: Motorola Small-Signal Device Databook, Q4/94 *Si 400mW 30V 800mA 300MHz GenPurp pkg:TO-18 3,2,1 .MODEL 2N2222 NPN (IS=81.2F NF=1 BF=195 VAF=98.6 IKF=0.48 ISE=53.7P NE=2 + BR=4 NR=1 VAR=20 IKR=0.72 RE=64.4M RB=0.258 RC=25.8M XTB=1.5 + CJE=89.5P VJE=1.1 MJE=0.5 CJC=28.9P VJC=0.3 MJC=0.3 TF=530P TR=368N) .END