VCA_LM13700
*SPICE Netlist generated by Advanced Sim server on 06.12.2025 16:21:09
.options MixedSimGenerated

*Schematic Netlist:
XIC1A NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 OUT 0 OUT Uout ExtraNet_XIC1A_9
+ ExtraNet_XIC1A_10 VAP ExtraNet_XIC1A_12 ExtraNet_XIC1A_13 ExtraNet_XIC1A_14
+ ExtraNet_XIC1A_15 ExtraNet_XIC1A_16 LM13700-DUAL
XIC1C NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 OUT 0 OUT Uout ExtraNet_XIC1C_9
+ ExtraNet_XIC1C_10 VAP ExtraNet_XIC1C_12 ExtraNet_XIC1C_13 ExtraNet_XIC1C_14
+ ExtraNet_XIC1C_15 ExtraNet_XIC1C_16 LM13700-DUAL
XIC1E NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 OUT 0 OUT Uout ExtraNet_XIC1E_9
+ ExtraNet_XIC1E_10 VAP ExtraNet_XIC1E_12 ExtraNet_XIC1E_13 ExtraNet_XIC1E_14
+ ExtraNet_XIC1E_15 ExtraNet_XIC1E_16 LM13700-DUAL
RR1 NetIC1_14 IN 3k
RR2 OUT VCM 27k
RR3 Uout 0 5.1k
RR4 VCM NetIC1_14 1k
RR5 VCM NetIC1_13 1k
RR_B NetR_B_1 NetR_B_2 100k
RR_BASE_GAIN NetIC1_16 NetR_BASE_GAIN_2 10k
RR_D VAP NetIC1_15 5k
RR_GAINA NetR_BASE_GAIN_2 NetR_BASE_GAIN_2 {100k * {GAIN}}
RR_GAINB NetR_BASE_GAIN_2 NetR_GAIN_3 {100k - (100k * {GAIN})}
QT VAP NetR_B_1 NetR_GAIN_3 QBC547B
VU_VCO_EN NetR_B_2 0 DC 0 PULSE(3.3 0 0 4u 1u 20m 40m) AC 1 0
VUin IN VCM DC 0 SIN(0 2V 440Hz 0 0 0) AC 1 0
VUneg VCM 0 +5V
VUpos VAP VCM +5V

.PLOT TRAN {v(IN)} =PLOT(1) =AXIS(1) =NAME(Uin) =UNITS(V)
.PLOT TRAN {v(OUT)} =PLOT(2) =AXIS(1) =NAME(Uout) =UNITS(V)
.PLOT TRAN {v(U_VCO_EN)} =PLOT(3) =AXIS(1) =NAME(VCO_EN) =UNITS(V)
.PLOT TRAN {ie(T)} =PLOT(4) =AXIS(1) =NAME(I_ABC) =UNITS(A)
.PLOT TRAN {ib(T)} =PLOT(5) =AXIS(1) =NAME(I_B) =UNITS(A)
.PLOT TRAN {i(R5)} =PLOT(6) =AXIS(1) =NAME(I_5) =UNITS(A)
.PLOT TRAN {i(R4)} =PLOT(6) =AXIS(1) =NAME(I_4) =UNITS(A)

.OPTIONS METHOD=GEAR MAXORD=2
*Selected Circuit Analyses:
.TRAN 45u 100m 20m 45u
.CONTROL
SWEEP GAIN 0 1 0.1
.ENDC

*Global Parameters:
.PARAM GAIN={0.5}

*Models and Subcircuits:
* A dual opamp ngspice model
* file name: LM13700-DUAL.ckt
.subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+
+ 2out 2in- 2in+ 2Dbias 2ABin
*//////////////////////////////////////////////////////////////////////
* (C) National Semiconductor, Inc.
* Models developed and under copyright by:
* National Semiconductor, Inc.
*/////////////////////////////////////////////////////////////////////
* Legal Notice: This material is intended for free software support.
* The file may be copied, and distributed; however, reselling the 
*  material is illegal

*////////////////////////////////////////////////////////////////////
* For ordering or technical information on these models, contact:
* National Semiconductor's Customer Response Center
*                 7:00 A.M.--7:00 P.M.  U.S. Central Time
*                                (800) 272-9959
* For Applications support, contact the Internet address:
*  amps-apps@galaxy.nsc.com

* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\            
* LM13700 Dual Operational Transconductance Amplifier                 
* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\                 
*
*                   Amplifier Bias Input
*                   | Diode Bias
*                   | | Positive Input
*                   | | | Negative Input
*                   | | | | Output
*                   | | | | | Negative power supply
*                   | | | | | | Buffer Input
*                   | | | | | | | Buffer Output
*                   | | | | | | | | Positive power supply
*                   | | | | | | | | |
.SUBCKT LM13700/NS  1 2 3 4 5 6 7 8 11
*
* Features:
* gm adjustable over 6 decades.
* Excellent gm linearity.
* Linearizing diodes.
* Wide supply range of +/-2V to +/-22V.
*
* Note:  This model is single-pole in nature and over-estimates
*       AC bandwidth and phase margin (stability) by over 2X.   
*       Although refinement may be possible in the future, please
*       use benchtesting to finalize AC circuit design.
* 
* Note: Model is for single device only and simulated
*       supply current is 1/2 of total device current.
*
******************************************************
* 
C1  6  4  4.8P
C2  3  6  4.8P
* Output capacitor  
C3  5  6  6.26P                                       
D1  2  4  DX
D2  2  3  DX
D3  11 21 DX
D4  21 22 DX
D5  1  26 DX
D6  26 27 DX
D7  5  29 DX
D8  28 5  DX
D10 31 25 DX
* Clamp for -CMR  
D11 28 25 DX                                        
* Ios source 
F1  4  3  POLY(1)   V6 1E-10 5.129E-2 -1.189E4 1.123E9 
F2  11 5  V2        1.022
F3  25 6  V3        1.0
F4  5  6  V1        1.022
* Output impedance 
F5  5  0  POLY(2)   V3 V7 0 0 0 0 1                  
G1  0  33 5         0 .55E-3
I1  11 6  300U
Q1  24 32 31        QX1
Q2  23 3  31        QX2
Q3  11 7  30        QZ
Q4  11 30 8         QY
V1  22 24 0V
V2  22 23 0V
V3  27 6  0V
V4  11 29 1.4
V5  28 6  1.2
V6  4  32 0V
V7  33 0  0V
.MODEL QX1 NPN (IS=5E-16     BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
.MODEL QY  NPN (IS=6E-15     BF=50)
.MODEL QZ  NPN (IS=5E-16     BF=266)  
.MODEL DX  D   (IS=5E-16)
.ENDS
*$
XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS
XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS
.ends

*
.MODEL QBC547B NPN(
+     IS=2.39E-14
+     NF=1.008
+     ISE=3.545E-15
+     NE=1.541
+     BF=294.3
+     IKF=0.1357
+     VAF=63.2
+     NR=1.004
+     ISC=6.272E-14
+     NC=1.243
+     BR=7.946
+     IKR=0.1144
+     VAR=25.9
+     RB=1
+     IRB=1E-06
+     RBM=1
+     RE=0.4683
+     RC=0.85
+     XTB=0
+     EG=1.11
+     XTI=3
+     CJE=1.358E-11
+     VJE=0.65
+     MJE=0.3279
+     TF=4.391E-10
+     XTF=120
+     VTF=2.643
+     ITF=0.7495
+     PTF=0
+     CJC=3.728E-12
+     VJC=0.3997
+     MJC=0.2955
+     XCJC=0.6193
+     TR=1E-32
+     CJS=0
+     VJS=0.75
+     MJS=0.333
+     FC=0.9579 )

.END