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https://github.com/erik-toth/audio-synth.git
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c3cb13c643
OPV Summenaddierer In der Praxis werden, solche Summenaddierer verwendet. Sobald ein Signale werden einfach bis zu einem gewissen Pegel geclippt, also abgeschnitten
67 lines
1.6 KiB
Plaintext
67 lines
1.6 KiB
Plaintext
VOICE-MIXER
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*SPICE Netlist generated by Advanced Sim server on 10.09.2025 14:45:45
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.options MixedSimGenerated
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*Schematic Netlist:
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XIC1A 0 NetIC1_2 VCC VEE U_out TL074
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RR1 U_1 NetIC1_2 10k
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RR2 U_2 NetIC1_2 10k
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RR_K NetIC1_2 U_out 10k
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VU_neg 0 VEE 12
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VU_pos VCC 0 12
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VU_sin1 U_1 0 DC 0 SIN(0 1 440 0 0 0) AC 1 0
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VU_sin2 U_2 0 DC 0 SIN(0 1 880 0 0 0) AC 1 0
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.PLOT TRAN {v(U_out)} =PLOT(1) =AXIS(1) =NAME(U_out) =UNITS(V)
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.PLOT TRAN {v(U_1)} =PLOT(1) =AXIS(1) =NAME(U_1) =UNITS(V)
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.PLOT TRAN {v(U_2)} =PLOT(1) =AXIS(1) =NAME(U_2) =UNITS(V)
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*Selected Circuit Analyses:
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.TRAN 10u 5m 0 10u
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*Models and Subcircuits:
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*TL074
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*Quad LoNoise JFETInput OpAmp pkg:DIP14
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*+ (A:3,2,4,11,1)(B:5,6,4,11,7)(C:10,9,4,11,8)(D:12,13,4,11,14)
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* Connections:
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* Non-Inverting Input
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* | Inverting Input
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* | | Positive Power Supply
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* | | | Negative Power Supply
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* | | | | Output
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* | | | | |
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.SUBCKT TL074 1 2 3 4 5
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C1 11 12 3.498E-12
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C2 6 7 15E-12
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DC 5 53 DX
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DE 54 5 DX
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DLP 90 91 DX
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DLN 92 90 DX
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DP 4 3 DX
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BGND 99 0 V=V(3)*.5 + V(4)*.5
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BB 7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
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+ I(VLP)*5E6 - I(VLN)*5E6
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GA 6 0 11 12 282.8E-6
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GCM 0 6 10 99 8.942E-9
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ISS 3 10 DC 195E-6
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HLIM 90 0 VLIM 1K
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J1 11 2 10 JX
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J2 12 1 10 JX
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R2 6 9 100E3
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RD1 4 11 3.536E3
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RD2 4 12 3.536E3
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RO1 8 5 150
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RO2 7 99 150
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RP 3 4 2.143E3
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RSS 10 99 1.026E6
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VB 9 0 DC 0
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VC 3 53 DC 2.2
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VE 54 4 DC 2.2
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VLIM 7 8 DC 0
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VLP 91 0 DC 25
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VLN 0 92 DC 25
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.MODEL DX D(IS=800E-18)
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.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
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.ENDS TL074
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.END |