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audio-synth/dev/general/MainSys/Project Logs for MainSys/EXT SCH ECO 01.01.2026 22-05-44.LOG
Erik Tóth f81b36c0f5 PCB ready for order
Chagned some comp from JLCPCB extended to basic for cost savings, manufactueruing cost ~110€, ordering costs ~140€
2026-01-01 23:31:31 +01:00

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Change Component Parameter Component Kind in J4 Old=Standard (No BOM) New=Standard
Change Component Parameter Component Kind in J5 Old=Standard (No BOM) New=Standard
Change Component Parameter Component Kind in J6 Old=Standard (No BOM) New=Standard
Change Component Parameter Component Kind in J7 Old=Standard (No BOM) New=Standard
Replace Symbol from J4 J 2.54-2*12P in C:\HTL\5AHEL\DA\github\audio-synth\dev\general\MainSys\EXT.SchDoc with J 2.54-2*12P from DA_LIB.IntLib
Replace Symbol from J5 J 2.54-2*12P in C:\HTL\5AHEL\DA\github\audio-synth\dev\general\MainSys\EXT.SchDoc with J 2.54-2*12P from DA_LIB.IntLib
Replace Symbol from J6 J 2.54-2*6P in C:\HTL\5AHEL\DA\github\audio-synth\dev\general\MainSys\EXT.SchDoc with J 2.54-2*6P from DA_LIB.IntLib
Replace Symbol from J7 J 2.54-2*6P in C:\HTL\5AHEL\DA\github\audio-synth\dev\general\MainSys\EXT.SchDoc with J 2.54-2*6P from DA_LIB.IntLib