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audio-synth/dev/analog/ETOTH-Amp_LM386/Project Outputs for ETOTH-Amp_LM386/ETOTH-Amp_LM386.nsx
2025-11-28 11:19:18 +01:00

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ETOTH-Amp_LM386
*SPICE Netlist generated by Advanced Sim server on 28.11.2025 11:11:11
.options MixedSimGenerated
*Schematic Netlist:
CC_DCBLOCK_IN IN NetC_DCBLOCK_IN_2 10uF
CC_DCBLOCK_OUT NetC_DCBLOCK_OUT_1 OUT 220uF
XIC1A NetIC1_1 0 NetIC1_3 0 NetC_DCBLOCK_OUT_1 VAP NetIC1_7 NetIC1_8 lm386
XIC1B NetIC1_1 0 NetIC1_3 0 NetC_DCBLOCK_OUT_1 VAP NetIC1_7 NetIC1_8 lm386
LL_Speaker 0 NetL_Speaker_2 0.1mH
RR_POTA 0 NetR_POT_2 {10k * {POS}}
RR_POTB NetR_POT_2 NetC_DCBLOCK_IN_2 {10k - (10k * {POS})}
RR_Speaker NetL_Speaker_2 OUT 8R
RR_static1 NetIC1_3 NetR_POT_2 100k
RR_static2 0 NetIC1_3 10k
VU_q VAP 0 10V
VUin IN 0 DC 0 SIN(5 2 220 0 0 0) AC 1 0
.PLOT TRAN {v(IN)} =PLOT(1) =AXIS(1) =NAME(U_IN) =UNITS(V) =RGB(0, 0, 255)
.PLOT TRAN {v(OUT)} =PLOT(2) =AXIS(1) =NAME(U_OUT) =UNITS(V) =RGB(255, 153, 0)
.OPTIONS METHOD=GEAR MAXORD=2
*Selected Circuit Analyses:
.TRAN 90.91u 22.73m 0 90.91u
*Global Parameters:
.PARAM POS={1}
*Models and Subcircuits:
*LM386 Audio power amplifier
* /*
* 1. The following model behavior shows good agreement with the
* LM386 data sheet values:
*
* a) Quiescent power supply current;
* b) High frequency response at low gain setting;
* c) Power-supply rejection ratio, both bypassed and unbypassed;
* d) Voltage gain, both with pins 1&8 shorted and open; and
* e) Total harmonic distortion.
*
* 2. The model has the following discrepancies:
*
* f) High-gain frequency response looks somewhat more wideband
* than the actual device;
* g) Peak-to-peak output voltage swing is a bit more than the
* data sheet value- in other words, the model drives
* closer to the rails; and
* h) Input bias current in this model is only about 7 nA,
* compared with the 250 nA "typical" value mentioned in
* the data sheet.
*
* 3. The frequency response characteristics of this LM386 model
* can be adjusted somewhat by changing C1, the rolloff capacitor in
* the voltage gain stage. It could also be made more realistic by
* tweaking transistor model parameters Cjc, Cje, Tr and Tf,
* although this can get pretty hairy.
*
* 4. Likewise, output drive capability could be made more
* realistic by tweaking transistor model parameters; again, this is
* hairy.
*/
*
.subckt lm386 g1 inn inp gnd out vs byp g8
* | | | | | | | |
* IC pins: 1 2 3 4 5 6 7 8
* input emitter-follower buffers:
q1 gnd inn 10011 ddpnp
r1 inn gnd 50k
q2 gnd inp 10012 ddpnp
r2 inp gnd 50k
* differential input stage, gain-setting
* resistors, and internal feedback resistor:
q3 10013 10011 10008 ddpnp
q4 10014 10012 g1 ddpnp
r3 vs byp 15k
r4 byp 10008 15k
r5 10008 g8 150
r6 g8 g1 1.35k
r7 g1 out 15k
* input stage current mirror:
q5 10013 10013 gnd ddnpn
q6 10014 10013 gnd ddnpn
* voltage gain stage & rolloff cap:
q7 10017 10014 gnd ddnpn
c1 10014 10017 15pf
* current mirror source for gain stage:
i1 10002 vs dc 5m
q8 10004 10002 vs ddpnp
q9 10002 10002 vs ddpnp
* Sziklai-connected push-pull output stage:
q10 10018 10017 out ddpnp
q11 10004 10004 10009 ddnpn 100
q12 10009 10009 10017 ddnpn 100
q13 vs 10004 out ddnpn 100
q14 out 10018 gnd ddnpn 100
* generic transistor models generated
* with MicroSim's PARTs utility, using
* default parameters except Bf:
.model ddnpn NPN(Is=10f Xti=3 Eg=1.11 Vaf=100
+ Bf=400 Ise=0 Ne=1.5 Ikf=0 Nk=.5 Xtb=1.5 Var=100
+ Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=2p Mjc=.3333
+ Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n
+ Tf=1n Itf=1 Xtf=0 Vtf=10)
.model ddpnp PNP(Is=10f Xti=3 Eg=1.11 Vaf=100
+ Bf=200 Ise=0 Ne=1.5 Ikf=0 Nk=.5 Xtb=1.5 Var=100
+ Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=2p Mjc=.3333
+ Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n
+ Tf=1n Itf=1 Xtf=0 Vtf=10)
.ends LM386
.END