Added Transistor Matched Pair PNP and Push-Pull for VCM

affected Project: ETOTH-TRI-SQR_VCO_SS

dev/analog/ETOTH-TRI-SQR-VCO_OTA_SS/Project Outputs for TRI-SQR-VCO_OTA_SS/Status Report.Txt

@@ -7,4 +7,4 @@ From  : Project [TRI-SQR-VCO_OTA_SS.PrjPcb]
 Files Generated   : 1
 Documents Printed : 0
 
-Finished Output Generation At 23:56:01 On 08.12.2025
+Finished Output Generation At 15:12:22 On 09.12.2025

dev/analog/ETOTH-TRI-SQR-VCO_OTA_SS/Project Outputs for TRI-SQR-VCO_OTA_SS/TRI-SQR-VCO_OTA_SS.nsx

@@ -1,5 +1,5 @@
 TRI-SQR-VCO_OTA_SS
-*SPICE Netlist generated by Advanced Sim server on 08.12.2025 23:57:13
+*SPICE Netlist generated by Advanced Sim server on 09.12.2025 15:13:04
 .options MixedSimGenerated
 
 *Schematic Netlist:
@@ -21,13 +21,11 @@ XIC3A VCM NetIC3_2 VAP 0 U_in TL074
 XIC3B U_SAW NetIC3_6 VAP 0 NetIC3_7 TL074
 XIC3C VCM NetIC3_9 VAP 0 U_C TL074
 XIC3D VCM NetIC3_13 VAP 0 U_CV TL074
-XICSA R.VMID NetICS_2 VAP 0 NetICS_2 LF411
+XICSA R.VMID NetICS_2 VAP 0 NetICS_6 TL071
-XICSB R.VMID NetICS_2 VAP 0 NetICS_2 LF411
 RPTC NetPTC_1 U_C 1k
 RR2 0 U_TRI 22k
 RR3 VAP NetIC1_1 15k
-RR4a NetIC3_2 NetR4a2_1 100k
+RR4a NetIC3_2 U_TRI 200k
-RR4a2 NetR4a2_1 U_TRI 100k
 RR4b U_in NetIC3_2 100k
 RR_Aa NetR_Aa_1 U_SQR_OTA 3.3k
 RR_Ab VCM NetR_Aa_1 330R
@@ -65,6 +63,8 @@ RRoff_a NetIC3_2 0 1Meg
 RRoff_b NetIC3_2 0 1Meg
 XT1 VCM NetC_an_2 NetC_an_1 U_C NetC_an_2 NetT1_6 DMMT3906W
 JT_SAW VCM fet_gate NetIC2_12 BF256B
+QTS1 VAP NetICS_6 NetICS_2 2N2222
+QTS2 0 NetICS_6 NetICS_2 2N2907
 VU_mess NetT1_6 NetIC1_16 0
 VU_MESSITOGND NetICS_2 VCM 0
 VU_messref NetR_E_2 NetIC2_7 0
@@ -79,7 +79,7 @@ VU_var NetR_off_d_1 0 1
 
 .OPTIONS ABSTOL=1e-10 RELTOL=1e-2 VNTOL=1e-4 METHOD=GEAR MAXORD=2
 *Selected Circuit Analyses:
-.TRAN 100u 20m 5m 100u
+.TRAN 20u 20m 5m 20u
 
 *Models and Subcircuits:
 * A dual opamp ngspice model
@@ -225,104 +225,48 @@ VLN   0 92 DC 25
 .MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
 .ENDS TL074
 
-* ///////////////////////////////////////////////////////////////////
+*TL071
-*//////////////////////////////////////////////////////////
+*Sngl LoNoise JFETInput OpAmp pkg:DIP8 3,2,7,4,6
-*LF411 LOW OFFSET, LOW DRIFT JFET INPUT OP-AMP MACRO-MODEL
+* Connections:
-*//////////////////////////////////////////////////////////
+*             Non-Inverting Input
-*
+*             | Inverting Input
-* connections:    non-inverting input
+*             | | Positive Power Supply
-*                 |   inverting input
+*             | | | Negative Power Supply
-*                 |   |   positive power supply
+*             | | | | Output
-*                 |   |   |   negative power supply
+*             | | | | |
-*                 |   |   |   |   output
+.SUBCKT TL071 1 2 3 4 5
-*                 |   |   |   |   |
+C1   11 12 3.498E-12
-*                 |   |   |   |   |
+C2    6  7 15E-12
-.SUBCKT LF411     1   2  99  50  28
+DC    5 53 DX
-*
+DE   54  5 DX
-* PINOUT ORDER +IN -IN V+ V- OUT
+DLP  90 91 DX
-*
+DLN  92 90 DX
-*
+DP    4  3 DX
-*Features:
+BGND 99  0 V=V(3)*.5 + V(4)*.5
-*Fast settling time (.01%) =           2uS
+BB    7 99 I=I(VB)*4.715E6 - I(VC)*5E6 + I(VE)*5E6 +
-*High bandwidth =                     3MHz
++              I(VLP)*5E6 - I(VLN)*5E6
-*High slew rate =                   10V/uS
+GA    6  0 11 12 282.8E-6
-*Low offset voltage =                 .5mV
+GCM   0  6 10 99 8.942E-9
-*Low supply current =                1.8mA
+ISS   3 10 DC 195E-6
-*
+HLIM 90  0 VLIM 1K
-****************INPUT STAGE**************
+J1   11  2 10 JX
-*
+J2   12  1 10 JX
-IOS 2 1 25.0P
+R2    6  9 100E3
-*^Input offset current
+RD1   4 11 3.536E3
-CI1 1 0 3P
+RD2   4 12 3.536E3
-CI2 2 0 3P
+RO1   8  5 150
-R1 1 3 1E12
+RO2   7 99 150
-R2 3 2 1E12
+RP    3  4 2.143E3
-I1 99 4 1.0M
+RSS  10 99 1.026E6
-J1 5 2 4 JX
+VB    9  0 DC 0
-J2 6 7 4 JX
+VC    3 53 DC 2.2
-R3 5 50 650
+VE   54  4 DC 2.2
-R4 6 50 650
+VLIM  7  8 DC 0
-*Fp2=28 MHZ
+VLP  91  0 DC 25
-C4 5 6 4.372P
+VLN   0 92 DC 25
-*
+.MODEL DX D(IS=800E-18)
-***********COMMON MODE EFFECT***********
+.MODEL JX PJF(IS=15E-12 BETA=270.1E-6 VTO=-1)
-*
+.ENDS TL071
-I2 99 50 800UA
-*^Quiescent supply current
-EOS 7 1 POLY(1) 16 49 .8E-3 1
-*Input offset voltage.^
-R8 99 49 80K
-R9 49 50 80K
-*
-*********OUTPUT VOLTAGE LIMITING********
-V2 99 8 2.13
-D1 9 8 DX
-D2 10 9 DX
-V3 10 50 2.13
-*
-**************SECOND STAGE**************
-*
-EH 99 98 99 49 1
-G1 98 9 5 6 20E-3
-R5 98 9 10MEG
-VA3 9 11 0
-*Fp1=18 HZ
-C3 98 11 857.516P
-*
-***************POLE STAGE***************
-*
-*Fp=30 MHz
-G3 98 15 9 49 1E-6
-R12 98 15 1MEG
-C5 98 15 5.305E-15
-*
-*********COMMON-MODE ZERO STAGE*********
-*
-G4 98 16 3 49 1E-8
-L2 98 17 144.7M
-R13 17 16 1K
-*
-**************OUTPUT STAGE**************
-*
-F6  99 50 VA7 1
-F5  99 23 VA8 1
-D5  21 23 DX
-VA7 99 21 0
-D6  23 99 DX
-E1  99 26 99 15 1
-VA8 26 27 0
-R16 27 28 50
-V5  28 25 0.646V
-D4  25 15 DX
-V4  24 28 0.646V
-D3  15 24 DX
-*
-***************MODELS USED**************
-*
-.MODEL DX D(IS=1E-15)
-.MODEL JX PJF(BETA=1.183E-3 VTO=-.65 IS=50E-12)
-*
-.ENDS
 
 *SRC=DMMT3906W;DI_DMMT3906W;BJTs PNP; Si;  40.0V  0.200A  257MHz   Diodes, Inc. PNP 
 .MODEL DI_DMMT3906W  PNP (IS=20.3f NF=1.00 BF=274 VAF=114 
@@ -353,4 +297,18 @@ Q2 C2 B2 E2 DI_DMMT3906W
 +              FC = 5.00000E-001
 +)
 
+*2N2222 MCE 5-20-97
+*Ref: Motorola Small-Signal Device Databook, Q4/94
+*Si 400mW 30V 800mA 300MHz GenPurp pkg:TO-18 3,2,1
+.MODEL 2N2222 NPN (IS=81.2F NF=1 BF=195 VAF=98.6 IKF=0.48 ISE=53.7P NE=2
++ BR=4 NR=1 VAR=20 IKR=0.72 RE=64.4M RB=0.258 RC=25.8M XTB=1.5
++ CJE=89.5P VJE=1.1 MJE=0.5 CJC=28.9P VJC=0.3 MJC=0.3 TF=530P TR=368N)
+
+*2N2907 MCE 5-27-97
+*Ref: Motorola Small-Signal Device databook, Q4/94
+*Si 400mW 40V 600mA 250MHz GenPurp pkg:TO-18 3,2,1
+.MODEL 2N2907 PNP (IS=60.9F NF=1 BF=260 VAF=114 IKF=0.36 ISE=30.2P NE=2
++ BR=4 NR=1 VAR=20 IKR=0.54 RE=85.8M RB=0.343 RC=34.3M XTB=1.5
++ CJE=27.6P VJE=1.1 MJE=0.5 CJC=15.3P VJC=0.3 MJC=0.3 TF=636P TR=442N)
+
 .END