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audio-synth/dev/general/MainSys/Project Outputs for MainSys/MAIN.LDP
2026-03-18 11:01:39 +01:00

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Layer Pairs Export File for PCB: C:\HTL\5AHEL\DA\github\audio-synth\dev\general\MainSys\MAIN.PcbDoc
LayersSetName=Top_Bot_Plated_Thru_Holes|DrillFile=main-roundholes-plated.txt|DrillLayers=gtl,g1,g2,gbl
LayersSetName=Top_Bot_Plated_Slot_Holes|DrillFile=main-slotholes-plated.txt|DrillLayers=gtl,g1,g2,gbl
LayersSetName=Top_Bot_NonPlated_Thru_Holes|DrillFile=main-roundholes-nonplated.txt|DrillLayers=gtl,g1,g2,gbl