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audio-synth/dev/general/MainSys/Project Logs for MainSys/MAIN PCB ECO 26.12.2025 23-19-39.LOG
Erik Tóth a24b15c27b Cleaned up Schematics
2026-03-18 11:01:39 +01:00

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Added Pin To Net: NetName=CV_1 Pin=R41_1-2
Added Pin To Net: NetName=CV_2 Pin=R41_2-2
Added Member To Class: ClassName=TOP Member=Component D1 RCLAMP0521P-N
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