Erik Tóth f0b0b62eaa PCB done ...

Ready for order; waiting for check

2025-12-28 22:38:23 +01:00

..

__Previews

PCB WIP 2

2025-12-27 01:02:47 +01:00

History

PCB done

2025-12-28 22:38:23 +01:00

Project Logs for MainSys

PCB WIP 2

2025-12-27 01:02:47 +01:00

Project Outputs for MainSys

PCB done

2025-12-28 22:38:23 +01:00

Project Outputs for MainSys 28.12.2025 22-04-53

PCB done

2025-12-28 22:38:23 +01:00

CV_GEN.SchDoc

PCB WIP 2

2025-12-27 01:02:47 +01:00

DRILL_CAM.Cam

PCB done

2025-12-28 22:38:23 +01:00

EXT.Harness

Started PCB Design

2025-12-24 23:03:33 +01:00

EXT.SchDoc

PCB WIP 2

2025-12-27 01:02:47 +01:00

MAIN_CAM.Cam

PCB done

2025-12-28 22:38:23 +01:00

MAIN.PcbDoc

PCB done

2025-12-28 22:38:23 +01:00

MAIN.step

PCB done

2025-12-28 22:38:23 +01:00

MainSys.PrjPcb

PCB done

2025-12-28 22:38:23 +01:00

MainSys.PrjPcbStructure

Started PCB Design

2025-12-24 23:04:43 +01:00

MCU.Harness

PCB main schematic progress

2025-12-18 16:28:24 +01:00

MCU.SchDoc

PCB WIP 2

2025-12-27 01:02:47 +01:00

OS.Harness

Main schematic progress; checked VCA -> Voice Mixer compatibilty; DA Lib Update to V3.2

2025-12-14 16:41:19 +01:00

OS.SchDoc

PCB WIP 2

2025-12-27 01:02:47 +01:00

PM.SchDoc

PCB WIP 2

2025-12-27 01:02:47 +01:00

SC.SchDoc

Started PCB Design

2025-12-24 23:03:33 +01:00

Schematics.pdf

PCB done

2025-12-28 22:38:23 +01:00

TOP.SchDoc

PCB WIP 2

2025-12-27 01:02:47 +01:00

VCA.Harness

PCB main schematic progress

2025-12-18 16:28:24 +01:00

VCF_A.Harness

Started PCB Design

2025-12-24 23:03:33 +01:00

VCF_A.SchDoc

PCB WIP 2

2025-12-27 01:02:47 +01:00

VCO.Harness

PCB main schematic progress

2025-12-18 16:28:24 +01:00

VCO.SchDoc

PCB WIP 2

2025-12-27 01:02:47 +01:00