mirror of
https://github.com/erik-toth/audio-synth.git
synced 2025-12-06 20:00:01 +00:00
190 lines
5.7 KiB
Plaintext
190 lines
5.7 KiB
Plaintext
VCA_LM13700
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*SPICE Netlist generated by Advanced Sim server on 06.12.2025 16:21:09
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.options MixedSimGenerated
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*Schematic Netlist:
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XIC1A NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 OUT 0 OUT Uout ExtraNet_XIC1A_9
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+ ExtraNet_XIC1A_10 VAP ExtraNet_XIC1A_12 ExtraNet_XIC1A_13 ExtraNet_XIC1A_14
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+ ExtraNet_XIC1A_15 ExtraNet_XIC1A_16 LM13700-DUAL
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XIC1C NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 OUT 0 OUT Uout ExtraNet_XIC1C_9
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+ ExtraNet_XIC1C_10 VAP ExtraNet_XIC1C_12 ExtraNet_XIC1C_13 ExtraNet_XIC1C_14
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+ ExtraNet_XIC1C_15 ExtraNet_XIC1C_16 LM13700-DUAL
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XIC1E NetIC1_16 NetIC1_15 NetIC1_14 NetIC1_13 OUT 0 OUT Uout ExtraNet_XIC1E_9
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+ ExtraNet_XIC1E_10 VAP ExtraNet_XIC1E_12 ExtraNet_XIC1E_13 ExtraNet_XIC1E_14
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+ ExtraNet_XIC1E_15 ExtraNet_XIC1E_16 LM13700-DUAL
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RR1 NetIC1_14 IN 3k
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RR2 OUT VCM 27k
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RR3 Uout 0 5.1k
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RR4 VCM NetIC1_14 1k
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RR5 VCM NetIC1_13 1k
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RR_B NetR_B_1 NetR_B_2 100k
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RR_BASE_GAIN NetIC1_16 NetR_BASE_GAIN_2 10k
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RR_D VAP NetIC1_15 5k
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RR_GAINA NetR_BASE_GAIN_2 NetR_BASE_GAIN_2 {100k * {GAIN}}
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RR_GAINB NetR_BASE_GAIN_2 NetR_GAIN_3 {100k - (100k * {GAIN})}
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QT VAP NetR_B_1 NetR_GAIN_3 QBC547B
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VU_VCO_EN NetR_B_2 0 DC 0 PULSE(3.3 0 0 4u 1u 20m 40m) AC 1 0
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VUin IN VCM DC 0 SIN(0 2V 440Hz 0 0 0) AC 1 0
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VUneg VCM 0 +5V
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VUpos VAP VCM +5V
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.PLOT TRAN {v(IN)} =PLOT(1) =AXIS(1) =NAME(Uin) =UNITS(V)
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.PLOT TRAN {v(OUT)} =PLOT(2) =AXIS(1) =NAME(Uout) =UNITS(V)
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.PLOT TRAN {v(U_VCO_EN)} =PLOT(3) =AXIS(1) =NAME(VCO_EN) =UNITS(V)
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.PLOT TRAN {ie(T)} =PLOT(4) =AXIS(1) =NAME(I_ABC) =UNITS(A)
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.PLOT TRAN {ib(T)} =PLOT(5) =AXIS(1) =NAME(I_B) =UNITS(A)
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.PLOT TRAN {i(R5)} =PLOT(6) =AXIS(1) =NAME(I_5) =UNITS(A)
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.PLOT TRAN {i(R4)} =PLOT(6) =AXIS(1) =NAME(I_4) =UNITS(A)
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.OPTIONS METHOD=GEAR MAXORD=2
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*Selected Circuit Analyses:
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.TRAN 45u 100m 20m 45u
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.CONTROL
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SWEEP GAIN 0 1 0.1
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.ENDC
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*Global Parameters:
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.PARAM GAIN={0.5}
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*Models and Subcircuits:
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* A dual opamp ngspice model
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* file name: LM13700-DUAL.ckt
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.subckt LM13700-DUAL 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout 2Bout 2Bin vcc+
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+ 2out 2in- 2in+ 2Dbias 2ABin
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*//////////////////////////////////////////////////////////////////////
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* (C) National Semiconductor, Inc.
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* Models developed and under copyright by:
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* National Semiconductor, Inc.
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*/////////////////////////////////////////////////////////////////////
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* Legal Notice: This material is intended for free software support.
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* The file may be copied, and distributed; however, reselling the
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* material is illegal
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*////////////////////////////////////////////////////////////////////
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* For ordering or technical information on these models, contact:
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* National Semiconductor's Customer Response Center
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* 7:00 A.M.--7:00 P.M. U.S. Central Time
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* (800) 272-9959
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* For Applications support, contact the Internet address:
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* amps-apps@galaxy.nsc.com
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* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
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* LM13700 Dual Operational Transconductance Amplifier
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* \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
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*
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* Amplifier Bias Input
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* | Diode Bias
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* | | Positive Input
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* | | | Negative Input
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* | | | | Output
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* | | | | | Negative power supply
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* | | | | | | Buffer Input
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* | | | | | | | Buffer Output
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* | | | | | | | | Positive power supply
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* | | | | | | | | |
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.SUBCKT LM13700/NS 1 2 3 4 5 6 7 8 11
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*
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* Features:
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* gm adjustable over 6 decades.
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* Excellent gm linearity.
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* Linearizing diodes.
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* Wide supply range of +/-2V to +/-22V.
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*
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* Note: This model is single-pole in nature and over-estimates
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* AC bandwidth and phase margin (stability) by over 2X.
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* Although refinement may be possible in the future, please
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* use benchtesting to finalize AC circuit design.
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*
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* Note: Model is for single device only and simulated
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* supply current is 1/2 of total device current.
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*
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******************************************************
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*
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C1 6 4 4.8P
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C2 3 6 4.8P
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* Output capacitor
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C3 5 6 6.26P
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D1 2 4 DX
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D2 2 3 DX
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D3 11 21 DX
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D4 21 22 DX
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D5 1 26 DX
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D6 26 27 DX
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D7 5 29 DX
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D8 28 5 DX
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D10 31 25 DX
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* Clamp for -CMR
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D11 28 25 DX
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* Ios source
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F1 4 3 POLY(1) V6 1E-10 5.129E-2 -1.189E4 1.123E9
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F2 11 5 V2 1.022
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F3 25 6 V3 1.0
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F4 5 6 V1 1.022
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* Output impedance
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F5 5 0 POLY(2) V3 V7 0 0 0 0 1
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G1 0 33 5 0 .55E-3
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I1 11 6 300U
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Q1 24 32 31 QX1
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Q2 23 3 31 QX2
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Q3 11 7 30 QZ
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Q4 11 30 8 QY
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V1 22 24 0V
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V2 22 23 0V
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V3 27 6 0V
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V4 11 29 1.4
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V5 28 6 1.2
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V6 4 32 0V
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V7 33 0 0V
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.MODEL QX1 NPN (IS=5E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
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.MODEL QX2 NPN (IS=5.125E-16 BF=200 NE=1.15 ISE=.63E-16 IKF=1E-2)
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.MODEL QY NPN (IS=6E-15 BF=50)
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.MODEL QZ NPN (IS=5E-16 BF=266)
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.MODEL DX D (IS=5E-16)
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.ENDS
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*$
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XU1C 1ABin 1DBias 1in+ 1in- 1out vcc- 1Bin 1Bout vcc+ LM13700/NS
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XU1A 2ABin 2DBias 2in+ 2in- 2out vcc- 2Bin 2Bout vcc+ LM13700/NS
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.ends
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*
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.MODEL QBC547B NPN(
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+ IS=2.39E-14
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+ NF=1.008
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+ ISE=3.545E-15
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+ NE=1.541
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+ BF=294.3
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+ IKF=0.1357
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+ VAF=63.2
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+ NR=1.004
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+ ISC=6.272E-14
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+ NC=1.243
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+ BR=7.946
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+ IKR=0.1144
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+ VAR=25.9
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+ RB=1
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+ IRB=1E-06
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+ RBM=1
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+ RE=0.4683
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+ RC=0.85
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+ XTB=0
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+ EG=1.11
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+ XTI=3
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+ CJE=1.358E-11
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+ VJE=0.65
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+ MJE=0.3279
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+ TF=4.391E-10
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+ XTF=120
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+ VTF=2.643
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+ ITF=0.7495
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+ PTF=0
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+ CJC=3.728E-12
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+ VJC=0.3997
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+ MJC=0.2955
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+ XCJC=0.6193
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+ TR=1E-32
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+ CJS=0
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+ VJS=0.75
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+ MJS=0.333
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+ FC=0.9579 )
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.END |